| Commit message (Collapse) | Author | Age | Files | Lines |
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Simplifies the flushing logic so that we only call into
con_driver->write() once. The existing implementation splits the
function into a normal path and a separate path when the in memory
console has wrapped. The logic is the same in both branches and
__flush_console() has enough bizarre crap happening with it's
not-a-lock-but-actually-a-lock flag variable.
Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
Spelling-corrected-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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NVRAM formats are always BE, so let's use the sparse annotation to catch
any issues (and correct said issues).
On LE platforms, the test was erroneously passing as with building the
nvram-format code on LE we were produces an incorrect NVRAM image.
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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We has to support surprise hotplug on PCI slots that don't support
it on hardware. So we're fully utilizing the PCIe link state change
event to detect the events (hot-remove and hot-add). The PDC (Presence
Detection Change) event isn't reliable for the purpose. For example,
PEX8718 on superMicro's machines.
This adds another PCI slot property "ibm,slot-broken-pdc" in the
device-tree, to indicate the PDC isn't reliable on those (software
claimed) surprise pluggable slots.
Reported-by: Hank Chang <hankmax0000@gmail.com>
Signed-off-by: Gavin Shan <gwhsan@linux.vnet.ibm.com>
Tested-by: Willie Liauw <williel@supermicro.com.tw>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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This issue is reported from superMicro's "p8dnu" platform. PEX9733
is connected to PHB direct slot. We create dynamic PCI slots for
its (5) downstream ports and all of them support surprise hotplug
capability. The problem is power supply lost on hot-remove and it
isn't turned on automatically on hot-add. It means the PCIe link
behind the slot isn't up and the PCI adapter behind the slot can't
be probed successfully.
This fixes the issue by forcing to turn on the power supply on
hardware when user (kernel) requests to do so. Those PCI slots
are identified by additional flag (PCI_SLOT_FLAG_FORCE_POWERON).
Reported-by: Hank Chang <hankmax0000@gmail.com>
Signed-off-by: Gavin Shan <gwhsan@linux.vnet.ibm.com>
Tested-by: Willie Liauw <williel@supermicro.com.tw>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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The PCI device and its PCIe capability offset should be valid in
pcie_slot_create(). No need to validate them. This removes the
validation logic to make the function simpler. No functional changes
introduced.
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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In surprise hot-add path, the power state isn't changed on hardware.
Instead, we set the cached power state (@slot->power_state) and
return OPAL_SUCCESS. The upper layer starts the PCI probing immediately
when receiving OPAL_SUCCESS. However, the PCIe link behind the PCI
slot is likely down. Nothing will be probed from the PCI slot even
we do have PCI adpater connected to the slot.
This fixes the issue by returning OPAL_ASYNC_COMPLETION to force
upper layer to poll the PCIe link before probing the PCI devices
behind the slot in surprise and managed hot-add paths.
Cc: stable # 5.4.0+
Fixes: 51931bad325 ("core/pci: Claim surprise hotplug capability")
Reported-by: Hank Chang <hankmax0000@gmail.com>
Signed-off-by: Gavin Shan <gwhsan@linux.vnet.ibm.com>
Tested-by: Willie Liauw <williel@supermicro.com.tw>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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According to PCIe spec, the presence bit is hardcoded to 1 if PCIe
switch downstream port doesn't support slot capability. The register
used for the check in pcie_slot_get_presence_state() is wrong. It
should be PCIe capability register instead of PCIe slot capability
register. Otherwise, we always have present bit on the PCI topology.
The issue is found on Supermicro's p8dtu2u machine:
# lspci -t
-+-[0022:00]---00.0-[01-08]----00.0-[02-08]--+-01.0-[03]----00.0
| \-02.0-[04-08]--
# cat /sys/bus/pci/slots/S002204/adapter
1
# lspci -vvs 0022:02:02.0
# lspci -vvs 0022:02:02.0
0022:02:02.0 PCI bridge: PLX Technology, Inc. PEX 8718 16-Lane, \
5-Port PCI Express Gen 3 (8.0 GT/s) Switch (rev ab) (prog-if 00 [Normal decode])
:
Capabilities: [68] Express (v2) Downstream Port (Slot+), MSI 00
:
SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet- Interlock-
Changed: MRL- PresDet- LinkState-
This fixes the issue by checking the correct register (PCIe capability).
Also, the register's value is cached in advance as we did for slot and
link capability.
Fixes: bc66fb67aee ("core/pci: Support PCI slot")
Cc: stable # 5.3.0+
Signed-off-by: Gavin Shan <gwhsan@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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The power control bit (SLOT_CTL, offset: PCIe cap + 0x18) isn't
reliable enough to reflect the PCI slot's power state. Instead,
the power indication bits are more reliable comparatively. This
leads to mismatch between the cached power state and PCI slot's
presence state, resulting in the hotplug driver in kernel refuses
to unplug the devices properly on the request. The issue was
found on below NVMe card on "supermicro,p8dtu2u" machine. We don't
have this issue on the integrated PLX 8718 switch.
# lspci
0022:01:00.0 PCI bridge: PLX Technology, Inc. PEX 9733 33-lane, \
9-port PCI Express Gen 3 (8.0 GT/s) Switch (rev aa)
0022:02:01.0 PCI bridge: PLX Technology, Inc. PEX 9733 33-lane, \
9-port PCI Express Gen 3 (8.0 GT/s) Switch (rev aa)
0022:02:04.0 PCI bridge: PLX Technology, Inc. PEX 9733 33-lane, \
9-port PCI Express Gen 3 (8.0 GT/s) Switch (rev aa)
0022:02:05.0 PCI bridge: PLX Technology, Inc. PEX 9733 33-lane, \
9-port PCI Express Gen 3 (8.0 GT/s) Switch (rev aa)
0022:02:06.0 PCI bridge: PLX Technology, Inc. PEX 9733 33-lane, \
9-port PCI Express Gen 3 (8.0 GT/s) Switch (rev aa)
0022:02:07.0 PCI bridge: PLX Technology, Inc. PEX 9733 33-lane, \
9-port PCI Express Gen 3 (8.0 GT/s) Switch (rev aa)
0022:17:00.0 Non-Volatile memory controller: Device 19e5:0123 (rev 45)
This updates the cached PCI slot's power state using the power
indication bits instead of power control bit, to fix above issue.
Cc: stable #5.4.0+
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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The ibm,opal node is normally created by Skiboot either in the HDAT parser
or after the input FDT has been unflattened. However, in order to supply
the /ibm,opal/power-mgt/enabled-stop-states property FDT we to tolerate
/ibm,opal/ existing in the input tree.
Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
Acked-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Commit 5ac71c9 ("pci: Avoid hot resets at boot time") missed to
avoid hot reset after fundamental reset for PCIe common slots.
This fixes it.
Cc: stable # 5.3.x
Reported-by: Guilherme G. Piccoli <gpiccoli@linux.vnet.ibm.com>
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Reviewed-by: Russell Currey <ruscur@russell.cc>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Currently, skiboot can't see SRIOV VFs. It introduces some troubles
as I can see: The device initialization logic (phb->ops->device_init())
isn't applied to VFs, meaning we have to maintain same and duplicated
mechanism in kernel for VFs only. It introduces difficulty to code
maintaining and prone to lose sychronization.
This was motivated by bug reported by Carol: The VF's Max Payload
Size (MPS) isn't matched with PF's on Mellanox's adapter even kernel
tried to make them same. It's caused by readonly PCIECAP_EXP_DEVCTL
register on VFs. The skiboot would be best place to emulate this bits
to eliminate the gap as I can see.
This supports SRIOV VFs. When the PF's SRIOV capability is populated,
the number of maximal VFs (struct pci_device) are instanciated, but
but not usable yet. In the mean while, PCI config register filter is
registered against PCIECAP_SRIOV_CTRL_VFE to capture the event of
enabling or disabling VFs. The VFs are initialized, put into the PF's
children list (pd->children), populate its PCI capabilities, and
register PCI config register filter against PCICAP_EXP_DEVCTL. The
filter's handler caches what is written to MPS field and returns
the cached value on read, to eliminate the gap mentioned as above.
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Reviewed-by: Russell Currey <ruscur@russell.cc>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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When we start to support SRIOV capability in subsequent patches,
a data struct will be instantiated and associated with the SRIOV
capability. This extends the current implementation for that.
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Reviewed-by: Russell Currey <ruscur@russell.cc>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Currently, AER capability is initialized in phb_ops->device_init()
which is called after the device is instantiated by PCI core, or
reinitializing the device after reset in EEH recovery path. It
means we are maintaining similar sets of codes for P7IOC, PHB3
and PHB4.
This moves the logic initializing AER capability from P7IOC, PHB3
and PHB4 to PCI core, thus the duplicated codes can be dropped.
No functional changes introduced by this.
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Reviewed-by: Russell Currey <ruscur@russell.cc>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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The logic initializing device's PCIe capability is resident in the
function pci_scan_one() from day one. It's because information
(e.g. vendor/device IDs) aren't stored into PCI device instance in
old days. Now, the PCI device instance contains all information
required to initialize its PCIe capability and others.
This moves the logic initializing PCIe capability from pci_scan_one()
to separate functions, pci_init_capabilities() and pci_init_pcie_cap().
pci_scan_one() is simplified to make code maintaining a bit easier.
Also, it will allow us to intorduce separate functions to initialize other
capabilities as we're doing for PCIe capability.
This also exports pci_init_capabilities() so that it can be reused by
SRIOV VFs in future. No logical changes introduced by this.
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Reviewed-by: Russell Currey <ruscur@russell.cc>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Provide an experimental option to compile using ELFv2 ABI even on big
endian builds. ELFv2 + BE is not officially supported by the toolchain,
but it works quite well. It may be useful as a small step toward a
little-endian build.
This saves about 200kB of text/data.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Handle the OSYS record on OPP machines in stead of VSYS
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Signed-off-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Fixes: 539487bae4b77
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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The bmc_platform pointer is set to NULL by default and on non-AMI BMC
platforms. As a result a few places in hw/ipmi/ipmi-sel.c will blindly
dereference a NULL pointer.
This patch sets the default value for bmc_platform to generic_bmc to
avoid this.
Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Adds a function to check whether a blob is a valid IBM ASCII keyword
VPD blob. This allows us to recognise when we do and do not have a VPD
blob and act accordingly.
Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
[stewart@linux.vnet.ibm.com: check if initial 0x84 exists. Spotted by Vasant]
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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This is similar to dt_new(), but if the node already exists it will
return the existing node. This is useful because some init code depends
on the presence of certain nodes, but where the node is actually created
is unimportant.
Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
Reviewed-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
Reviewed-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Changes the skiboot output so that rather than printing the FDT address
and size in hex it prints the address in hex and the size in decimal.
Doing this lets you read the FDT blob with getmemproc and some
copy+paste.
Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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The kernel command line from nvram and the stdout-path are
useful to know when debugging console related problems.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Add static to various declarations that can use it, as found by sparse.
It turns out that one of these (fsp_pcie_inv_lock in
platform/ibm-fsp/firenze.c) is actually unused, so remove it.
Signed-off-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Some code path want to look at all the CPUs that are "present",
which means they have been enabled by HB/Cronus and can be accessed
via XSCOMs, even if they haven't called in yet.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Exposes a new flag to the OS to indicate that OPAL calls
are needed for masking and unmasking and forward the calls
to the source so that PHB4 can do the right thing
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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This adds the infrastructure for an interrupt source to provide
a name for an interrupt directed toward OPAL. Those names will
be put into an "opal-interrupts-names" property which is a
standard DT string list corresponding 1:1 with the "opal-interrupts"
property.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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It will be used by xive
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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We're now only missing some assert() branches in buddy testing.
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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It operates on bits representing whatever objects the caller wants
it to represent, it's not per-se a memory allocator (it's meant to
be used among others by XIVE for VP allocations). As such it cannot
keep linked lists of free objects, so don't expect stellar perfs.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
[stewart@linux.vnet.ibm.com: add (C) header, fix gcc4.8 build error]
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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The worst test suite ever
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
[stewart@linux.vnet.ibm.com: add (C) header]
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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force_dummy_console() was only ever used to ensure the dummy console
would be initialised when the platform did not setup it's usual console.
The new console init path will uses the dummy console by default so this
is now unnecessary.
Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Flushing the OPAL console is now handled by a driver specific OPAL call
handler so this can be removed.
Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Adds a new structure that contains the implementations of the various
OPAL console handlers. This is intended to replace the existing ad-hoc
mechanism where the OPAL call handlers are overwritten in the OPAL
console driver's init function.
Currently this just moves the site where the OPAL call handlers are
overwritten to inside of console.c, but it is intended to give us a
mechanism for implementing features such as pointer validation for the
OPAL console calls without having to manually update each driver.
This also helps to clarify differences between the internal (skiboot)
console and the external (OPAL) console.
Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Adds a separate structure to house the operations for the OPAL console.
This is used to define a new API for dealing with the OPAL console in
the next patch.
Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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The OPAL console is normally completely independent to the internal
skiboot console. The dummy console is atypical compared to the FSP and
UART backends as it interacts with both consoles. This patch just adds
a few comments to clarify the situation.
Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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There's no need for this to be in the skiboot core console code. Also do
a few cleanups while we're shovling code around.
Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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The creation of /ibm,skiboot/console/serial@<xyz> nodes is pretty much
identical across the various OPAL console drivers. This patch moves it
into a helper function as a cleanup.
Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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The skiboot console lock protects the skiboot log buffer. All writes to
the log buffer need to be done via console_write() so there is no need
to export the lock outside console.c
Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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There is only one use of this function outside of console.c and that
usage is broken. As the name suggests this is an internal function that
is only safe when the console lock held is held. flush_console() will
acquire the lock for the caller so that should be used instead.
Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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There may be circumstances in which a user wants to force a full IPL reboot
rather than using fast reboot. Add a new reboot type, OPAL_REBOOT_FULL_IPL,
that disables fast reboot. On platforms which don't support fast reboot,
this will be equivalent to a normal reboot.
Signed-off-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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A few places (mostly old code) were using:
add_property_cells(hi32(number), lo32(number));
This patch converts them to use the helper rather than doing it manually.
Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
Reviewed-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Reference bug: https://github.com/open-power/op-build/issues/751
Signed-off-by: Pridhiviraj Paidipeddi <ppaidipe@linux.vnet.ibm.com>
[stewart@linux.vnet.ibm.com: tweak message slightly]
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Currently chip->occ_functional data field set's to true always whether
ibm,occ-functional-state property exists or not.
ibm,occ-functional-state property of xscom node's are populated only in
ibm,fsp systems by detecting the OCC state in OPAL/SPIRA. In
non-fsp(i.e OpenPower) systems this property is not populating. But OPAL
sets chip->occ_functional field incorrectly to true without acually knowing
the occ state.
OCC Spec says:
When OCC is told to go active it will populate OCC-OPAL shared memory
interface with ‘valid’ and all Pstate data.
So incase of OpenPower systems OPAL can add DT property
ibm,occ-functional-state and set the chip->occ_functional when OPAL finds
the valid homer region and corresponding occ_valid byte is set to 0x1.
Signed-off-by: Pridhiviraj Paidipeddi <ppaidipe@linux.vnet.ibm.com>
[stewart@linux.vnet.ibm.com: squash commits, tweak commit message]
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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In fast-reboot path, OPAL is re-initializing the PCI subsystem.
Accordingly set firmware progress sensor status with IPMI_FW_PCI_INIT.
Signed-off-by: Pridhiviraj Paidipeddi <ppaidipe@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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The nest mmu address scom was hardcoded which could lead to boot
failure on POWER9 systems without a nest mmu. For example Mambo
doesn't model the nest mmu which results in the following failure when
calling opal_nmmu_set_ptcr() during kernel load:
WARNING: 20856759: (20856757): Invalid address 0x0000000028096258 in XSCOM range, SCOM=0x00280962b
WARNING: 20856759: (20856757): Attempt to store non-existent address 0x00001A0028096258
20856759: (20856757): 0x000000003002DA08 : stdcix r26,r0,r3
FATAL ERROR: 20856759: (20856757): Check Stop for 0:0: Machine Check with ME bit of MSR off
This patch instead reads the address from the device-tree and makes
opal_nmmu_set_ptcr return OPAL_UNSUPPORTED on systems without a nest
mmu.
Signed-off-by: Alistair Popple <alistair@popple.id.au>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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PHB and PE numbers are sometimes printed as decimal and sometimes as
hexadecimal, which is confusing. Standardise on hexadecimal.
This is especially useful now that PHB numbers in Linux always match
their OPAL ID.
Signed-off-by: Russell Currey <ruscur@russell.cc>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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