summaryrefslogtreecommitdiffstats
path: root/core
Commit message (Collapse)AuthorAgeFilesLines
...
* chip: Add support for discovering chips on mamboMichael Ellerman2017-06-141-0/+5
| | | | | | | | | | | | | | | Currently the only way for skiboot to discover chips is by looking for xscom nodes. But on mambo it's currently not possible to create multiple xscom nodes, which means we can only simulate a single chip system. However it seems we can fairly cleanly add support for a special mambo chip node, and use that to instantiate multiple chips. Add a check in init_chip() that we're not clobbering an already initialised chip, now that we have two places that initialise chips. Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* chip: Factor out chip inititialisationMichael Ellerman2017-06-141-21/+29
| | | | | | | | | | | Move the chip initialisation logic into a function, so we can call it from elsewhere in future. Only change to the logic is that we don't insert the chip into chips[] until we've finished initialising it. Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* phb4: Activate shared PCI slot on witherspoonFrederic Barrat2017-06-071-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Witherspoon systems come with a 'shared' PCI slot: physically, it looks like a x16 slot, but it's actually two x8 slots connected to two PHBs of two different chips. Taking advantage of it requires some logic on the PCI adapter. Only the Mellanox CX5 adapter is known to support it at the time of this writing. This patch enables support for the shared slot on witherspoon if a x16 adapter is detected. Each x8 slot has a presence bit, so both bits need to be set for the activation to take place. Slot sharing is activated through a gpio. Note that there's no easy way to be sure that the card is indeed a shared-slot compatible PCI adapter and not a normal x16 card. Plugging a normal x16 adapter on the shared slot should be avoided on witherspoon, as the link won't train on the second slot, resulting in a timeout and a longer boot time. Only the first slot is usable and the x16 adapter will end up using only half the lines. If the PCI card plugged on the physical slot is only x8 (or less), then the presence bit of the second slot is not set, so this patch does nothing. The x8 (or less) adapter should work like on any other physical slot. Signed-off-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com> [stewart@linux.vnet.ibm.com: re-org code, move into platform file] Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* Disable nap on P8 Mambo, public release has bugsStewart Smith2017-06-071-0/+4
| | | | | Fixes: 9567e18728d0559bc5f79ea927d684dc3b1e3555 Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* PCI: only wait 20ms for PHB logic to settle if we detected any PHBsStewart Smith2017-06-071-1/+6
| | | | | | | | Otherwise, in simulators such as Mambo, we needlessly wait 20ms, which takes much longer than 20ms to do, because simulator. Fixes: 41b14f9452c25f3dd74a8304763a3cc58bff019f Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* Convert important polling loops to spin at lowest SMT priorityNicholas Piggin2017-06-064-3/+13
| | | | | | | | | | | The pattern of calling cpu_relax() inside a polling loop does not suit the powerpc SMT priority instructions. Prefrred is to set a low priority then spin until break condition is reached, then restore priority. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> [stewart@linux.vnet.ibm.com: fixup lpc-uart wait_tx_room() and unit test] Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* Improve cpu_idle when PM is disabledNicholas Piggin2017-06-063-33/+59
| | | | | | | | | | | | | Split cpu_idle() into cpu_idle_delay() and cpu_idle_job() rather than requesting the idle type as a function argument. Have those functions provide a default polling (non-PM) implentation which spin at the lowest SMT priority. This moves all the decrementer delay code into the CPU idle code rather than the caller. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* cpu: Introduce smt_lowest()Nicholas Piggin2017-06-062-4/+4
| | | | | | | | | | | | Recent CPUs have introduced a lower SMT priority. This uses the Linux pattern of executing priority nops in descending order to get a simple portable way to put the CPU into lowest SMT priority. Introduce smt_lowest() and use it in place of smt_very_low and smt_low ; smt_very_low sequences. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* pci: Wait 20ms before checking presence detect on PCIeBenjamin Herrenschmidt2017-06-061-0/+5
| | | | | | | | As the PHB presence logic has a debounce timer that can take a while to settle. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* phb4: Block D-state power management on direct slotsBenjamin Herrenschmidt2017-06-061-0/+10
| | | | | | | | As current revisions of PHB4 don't properly handle the resulting L1 link transition. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* pci: Make handling of config filters genericBenjamin Herrenschmidt2017-06-061-1/+23
| | | | | | | Move phb3_pcicfg_filter() to pci.c, rename it to pci_handle_cfg_filters() Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* phb3+iov: Fixup support for config space filtersBenjamin Herrenschmidt2017-06-061-6/+5
| | | | | | | | | | | The filter should be called before the HW access and its return value control whether to perform the access or not Also fix the pci-iov.c return values to match accordingly otherwise this breaks SR-IOV Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* pci: Add bitmap to know if a pci device has cfg reg filtersBenjamin Herrenschmidt2017-06-062-0/+11
| | | | | | | | This avoids doing a search through the list of all devices on every config space access to every device under a PHB. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* hdata/test: Add memory reservations to hdata_to_dtOliver O'Halloran2017-06-061-11/+11
| | | | | | | | | | | | | | Currently memory reservations are parsed, but since they are not processed until mem_region_init() they don't appear in the output device tree blob. Several bugs have been found with memory reservations so we want them to be part of the test output. Add them and clean up several usages of printf() since we want only the dtb to appear in standard out. Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Reviewed-by: Gavin Shan <gwshan@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* core/pci: Rename pci_slot_op poll to run_smMichael Neuling2017-05-313-6/+6
| | | | | | | | | | | | | | | This renames the "poll" op to "run_sm" (short for run state machine). I think this is a better name since the function does a bunch of things like reseting the slot. Also it avoids confusion with the "poll_link" op which does something different (and can even be called from run_sm). No functional change. Signed-off-by: Michael Neuling <mikey@neuling.org> Acked-by: Gavin Shan <gwshan@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* mem_region: Add HW-only memory resevationsOliver O'Halloran2017-05-261-2/+21
| | | | | | | | | | | | Add a new type of memory reservation that indicates a memory region is only used by hardware and should not be touched by software. This is needed for the in-memory tracing buffers. These reservations have the "no-map" property which indicates that the host kernel should not setup any virtual address mappings that cover this range, unless of course a device driver does so explicitly. Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* mem_region: rename HW_RESERVE to FW_RESERVEOliver O'Halloran2017-05-263-8/+8
| | | | | | | | | | | Currently all existing reservations are made by hostboot itself or on behalf of some other part of system firmware (e.g. the OCCs). We want to add a "true" hardware reservation type that should not be touched by the host OS. To prepare for that this patch renames the existing reservation type to refect it's actual usage. Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* core/mem_region: Print a useful error on overlapOliver O'Halloran2017-05-161-1/+28
| | | | | | | | | | New memory regions need to be either fully contained by an existing region or completely disjoint. Right now we just fail silently or crash with an assert which is less than helpful. Printing some basic information, such as the names of the overlapping regions is helpful. Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* core/test: Test pre-init memory reservationsOliver O'Halloran2017-05-161-6/+9
| | | | | Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* mem_region: Add reserved regions after memory initOliver O'Halloran2017-05-161-7/+30
| | | | | | | | | | | | | | | | | | | | | | When a new memory region is added (e.g for memory reserved by firmware) the list of existing memory regions is iterated through and a cut-out is made in any existing region that overlaps with the new one. Prior to the HDAT reservations being made the region init process was always: 1) Create regions from the memory@<addr> DT nodes. (mostly large) 2) Create reserved regions from the device-tree. (mostly small) When adding new regions we have assume that the new region will only every intersect with at most one existing region, which it will split. Adding reservations inside the HDAT parser breaks this because when adding the memory@<addr> node regions we can potentially overlap with multiple reserved regions. This patch fixes this by maintaining a seperate list of memory reservations and delaying merging them until after the normal memory init has finished, similar to how DT reservations are handled. Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* GCC7: fixes for -Wimplicit-fallthrough expected regexesStewart Smith2017-05-121-1/+2
| | | | | | | | | | | It turns out GCC7 adds a useful warning and does fancy things like parsing your comments to work out that you intended to do the fallthrough. There's a few places where we don't match the regex. Fix them, as it's harmless to do so. Found by building on Fedora Rawhide in Travis. Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* Add global physical memory mapMichael Neuling2017-05-101-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | This adds a global map for allocating physical memory address. This centralises physical memory space allocations into one location rather than spread through, PHB, XIVE, NX etc. This adds a new call phys_map_get() which takes a chip, type and index and returns a address and size for the region to be used. An error in a call to this function crashes skiboot. This is done since bogus calls here are going to be hit by developers not users and they need to be fixed. Currently only P9 is implemented but other chips should be easy to add. On P9 BARs are generally set by skiboot. On P8 this was done by hostboot so this is not needed there. This just adds the infrastructure. User (PHB4, XIVE etc) will be migrated in subsequent patches. Suggested-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* core/pci.c: Don't reserve PCI slots for non-pluggable slotsAlistair Popple2017-05-101-6/+9
| | | | | | | | | | If a downstream PCIe link is down we currently reserve a number of busses for hot pluggable devices. However we do not need to do this when we know a slot is not hotplug capable. Signed-off-by: Alistair Popple <alistair@popple.id.au> Acked-by: Gavin Shan <gwshan@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* FSP: Notify FSP of Platform Log ID after Host Initiated Reset ReloadStewart Smith2017-05-102-6/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Trigging a Host Initiated Reset (when the host detects the FSP has gone out to lunch and should be rebooted), would cause "Unknown Command" messages to appear in the OPAL log. This patch implements those messages How to trigger FSP RR(HIR): $ putmemproc 300000f8 0x00000000deadbeef s1 k0:n0:s0:p00 ecmd_ppc putmemproc 300000f8 0x00000000deadbeef Log showing unknown command: / # cat /sys/firmware/opal/msglog | grep -i ,3 [ 110.232114723,3] FSP: fsp_trigger_reset() entry [ 188.431793837,3] FSP #0: Link down, starting R&R [ 464.109239162,3] FSP #0: Got XUP with no pending message ! [ 466.340598554,3] FSP-DPO: Unknown command 0xce0900 [ 466.340600126,3] FSP: Unhandled message ce0900 The message we need to handle is "Get PLID after host initiated FipS reset/reload". When the FSP comes back from HIR, it asks "hey, so, which error log explains why you rebooted me?". So, we tell it. Reported-by: Pridhiviraj Paidipeddi <ppaidipe@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* nx: Add POWER9 DARN supportMichael Neuling2017-04-271-1/+1
| | | | | | | | | | | | | | This sets up the per chip RNG MMIO BAR and points the per core DARN BAR at it. This is needed on P9 to enabled the DARN instruction (otherwise it'll cause a xstop). This includes a minor rework of some #defines to abstract MMIO definitions. Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* console: Set log level from nvramMichael Neuling2017-04-271-0/+60
| | | | | | | | | | | | | | | | | | | | | This adds two new nvram options to set the console log level for the driver/uart and in memory. These are called log-level-memory and log-level-driver. These are only set once we have nvram inited. To set them you do: nvram -p ibm,skiboot --update-config log-level-memory=9 nvram -p ibm,skiboot --update-config log-level-driver=9 You can also use the named versions of emerg, alert, crit, err, warning, notice, printf, info, debug, trace or insane. ie. nvram -p ibm,skiboot --update-config log-level-driver=insane Suggested-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Michael Neuling <mikey@neuling.org> Reviewed-by: Cyril Bur <cyril.bur@au1.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* interrupts: Add an "irq_for_each_source" iteratorBenjamin Herrenschmidt2017-04-191-0/+12
| | | | | | | This will be used by subsequent XIVE reset improvements Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Michael Neuling <mikey@neuling.org>
* device: add dt_find_by_name_addrOliver O'Halloran2017-04-072-0/+51
| | | | | | | | | | | | Adds two helper functions that allow device nodes to be found via their name and unit address. One will take an integer address and format it to a hex string while the other looks up the unit based a user supplied string. This is handy in a few places inside the HDAT parser. Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Reviewed-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* core/init: Use '_' as separator in names of "exports" propertiesMichael Ellerman2017-04-051-2/+7
| | | | | | | | | | | | | | | | The names of the properties under /ibm,opal/firmware/exports are used directly by Linux to create files in sysfs. To remain consistent with the existing naming of OPAL sysfs files, use '_' as the separator. In particular for the symbol map which is already exported separately, it's cleaner for the two files to have the same name, eg: /sys/firmware/opal/exports/symbol_map /sys/firmware/opal/symbol_map Fixes: 9ffbfe269ec6 ("core/init: Add hdat-map property to OPAL node") Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* core/pci: Add phb->ops->device_removeGavin Shan2017-03-311-0/+3
| | | | | | | | | | This adds another PHB callback (device_remove()), corresponding to device_init(). With it, the PHB3 layer can receive notification upon PCI topology changes. This functionality will be used by the subsequent patches. Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* core/pci: Fix lost NVMe adapter behind PMC 8546 switchGavin Shan2017-03-311-6/+22
| | | | | | | | | | | | | | | | | | | | | The NVMe adapter in below PCI topology is lost. The root cause is the presence bit on its PCI slot is missed, but the PCIe link has been up. The PCI core doesn't probe the adapter behind the slot, leading to lost NVMe adapter in the particular case. PHB3 root port PLX switch 8748 (10b5:8748) PLX swich 9733 (10b5:9733) PMC 8546 swtich (11f8:8546) NVMe adapter (1c58:0023) This fixes the issue by overriding the PCI slot presence bit with PCIe link state bit. Reported-by: Mark E Schreiter <markes@us.ibm.com> Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com> Tested-by: Mark E Schreiter <markes@us.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* core/pci: Disable surprise hotplug on root portGavin Shan2017-03-311-5/+7
| | | | | | | | | | | | | We are creating PCI slot on root port, where the PCI slot isn't supported from hardware. For this case, the surprised hotplug functionality shouldn't be enabled even the link state change reporting is supported in hardware. This disables surprise hotplug if PCI slot isn't supported in hardware. Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* core/pci: Ignore PCI slot capability on root portGavin Shan2017-03-311-2/+7
| | | | | | | | | | | | | | | | We are creating PCI slot on root port, where the PCI slot isn't supported from hardware. For this case, we shouldn't read the PCI slot capability from hardware. When bogus data returned from the hardware, we will attempt to the PCI slot's power state or enable surprise hotplug functionality. All of them can't be accomplished without hardware support. This leaves the PCI slot's capability list 0 if PCICAP_EXP_CAP_SLOT isn't set in hardware (pcie_cap + 0x2). Otherwise, the PCI slot's capability list is retrieved from hardware (pcie_cap + 0x14). Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* Introduce NPU2 supportAlistair Popple2017-03-301-0/+1
| | | | | | | | | | | | | | | | | | NVLink2 is a new feature introduced on POWER9 systems. It is an evolution of of the NVLink1 feature included in POWER8+ systems but adds several new features including support for GPU address translation using the Nest MMU and cache coherence. Similar to NVLink1 the functionality is exposed to the OS as a series of virtual PCIe devices. However the actual hardware interfaces are significantly different which limits the amount of common code that can be shared between implementations in the firmware. This patch adds basic hardware initialisation and exposure of the virtual NVLink2 PCIe devices to the running OS. Signed-off-by: Alistair Popple <alistair@popple.id.au> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* phb3/4: Set max link speed via nvramMichael Neuling2017-03-291-0/+17
| | | | | | | | | | | | | This adds an nvram parameter pcie-max-link-speed to configure the max speed of the pcie link. This can be set from the petitboot prompt using: nvram -p ibm,skiboot --update-config pcie-max-link-speed=4 This takes preference over anything set in the device tree and is global to all PHBs. Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* core/init: Add hdat-map property to OPAL nodeMatt Brown2017-03-241-0/+29
| | | | | | | | | | Exports the HDAT heap to the OS. This allows the OS to view the HDAT heap directly. This allows us to view the HDAT area without having to use getmemproc. Signed-off-by: Matt Brown <matthew.brown.dev@gmail.com> Reviewed-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* fast-reboot: remove CAPI checkAndrew Donnellan2017-03-201-12/+0
| | | | | | | | | Now that we can handle disabling CAPI mode on PHBs, we don't need to disable fast reboot if there's a CAPI mode PHB. Signed-off-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Reviewed-by: Gavin Shan <gwshan@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* fast-reboot: creset PHBs on fast rebootAndrew Donnellan2017-03-201-0/+21
| | | | | | | | | | | On fast reboot, perform a creset of all PHBs. This ensures that any PHBs that are fenced will be working after the reboot. A later patch will disable CAPI mode during cresets - as such, PHBs in CAPI mode will return to regular PCIe mode during a fast reboot. Signed-off-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* core/pci: remove misleading fast reboot commentAndrew Donnellan2017-03-201-2/+0
| | | | | | | | We have fast reboot now, so pci_reset() is no longer a "remnant" thereof. Signed-off-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Reviewed-by: Gavin Shan <gwshan@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* hmi: Print CAPP FIR information when handling CAPP malfunction alertsAndrew Donnellan2017-03-161-0/+29
| | | | | | | | | | | | | When diagnosing or debugging CAPP errors, it's rather useful to have the CAPP FIR, which often provides very helpful information. Print the CAPP FIR to the log when we handle a Malfunction Alert HMI for a CAPP error. Cc: Frederic Barrat <fbarrat@linux.vnet.ibm.com> Signed-off-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Reviewed-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* hmi: refactor malfunction alert handlingAndrew Donnellan2017-03-161-46/+42
| | | | | | | | | | | | | | | | | The logic in decode_malfunction() is rather tricky to follow. Refactor the code to make it easier to follow. No functional change. Cc: Russell Currey <ruscur@russell.cc> Cc: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com> Cc: Ryan Grimm <grimm@linux.vnet.ibm.com> Cc: Frederic Barrat <fbarrat@linux.vnet.ibm.com> Cc: Daniel Axtens <dja@axtens.net> Signed-off-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Reviewed-by: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com> Reviewed-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* generic platform: If /bmc in device tree, attempt to init oneStewart Smith2017-03-161-3/+40
| | | | | | | | | | For the most part, this gets us somewhere on some OpenPOWER systems before there's a platform file for that machine. Useful in bringup only, and marked as such with scary looking log messages. Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* init: Cosmetic fixup of commentBenjamin Herrenschmidt2017-03-091-2/+2
| | | | | Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* core/test: use strcmp for console testsOliver O'Halloran2017-03-072-6/+6
| | | | | | | | | The console logging tests use a memcmp and strlen() with string literal arguments. Unfortunately the strings were updated at some point and not kept in sync. strcmp() should be fine here so use that instead. Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* core/test/run-trace: Reduce number of samples when running under valgrindStewart Smith2017-03-071-1/+3
| | | | | | | This reduces 'make check' run time by ~10 seconds on my laptop, and just the run-trace test itself takes 15 seconds less (under valgrind). Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* device: implement dt_translate_address() properlyOliver O'Halloran2017-03-072-3/+109
| | | | | | | | | | | | | | | | Currently this is implemented by calling dt_get_address() which only works when a device is a child of the root node. This patch implements the functionality to work with nested nodes when all parent nodes have an appropriate "ranges" property. This implementation only works for up to 64 bit addresses. Properly supporting larger addressing schemes is a fair amount of (probably pointless) work, so I'm leaving supporting that until we have an actual a need for it. Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Tested-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* pci/quirk: Populate device tree for AST2400 VGARussell Currey2017-03-031-0/+46
| | | | | | | | | | | | | | | | | Adding these properties enables the kernel to function in the same way that it would if it could no longer access BMC configuration registers through a backdoor, which may become the default in future. The comments describe how isolating the host from the BMC could be achieved in skiboot, assuming all kernels that the system boots support this. Isolating the BMC and the host from each other is important if they are owned by different parties; for example, a cloud provider renting machines "bare metal". Acked-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Russell Currey <ruscur@russell.cc> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* pci: Add a framework for quirksRussell Currey2017-03-033-1/+45
| | | | | | | | | | | | | | | | | | In future we may want to be able to do fixups for specific PCI devices in skiboot, so add a small framework for doing this. This is not intended for the same purposes as quirks in the Linux kernel, as the PCI devices that quirks can match for in skiboot are not properly configured. This is intended to enable having a custom path to make changes that don't directly interact with the PCI device, for example adding device tree entries. Signed-off-by: Russell Currey <ruscur@russell.cc> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Reviewed-by: Gavin Shan <gwshan@linux.vnet.ibm.com> [stewart@linux.vnet.ibm.com: fix 0 vs NULL sparse warning, (C) date] Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* lpc/uart: Support routing of selected LPC interrupts to LinuxBenjamin Herrenschmidt2017-03-031-0/+3
| | | | | | | | | | | | | Each LPC interrupt can be routed to one of 4 lines to the PSI bridge which represent 4 different system interrupts. This allows LPC clients to request as specific target (Linux or OPAL) and makes the LPC core pick a route and configure it appropriately. The UART is updated to properly forward interrupts to Linux if necessary Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* buddy: Check zalloc() return valueStewart Smith2017-03-021-0/+2
| | | | | | | | | All callers of buddy_create() are correctly checking return value. Found by static analysis Fixes: 8594b9c5bd456205255ea2241ba224f47480efad Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
OpenPOWER on IntegriCloud