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| author | Michael Neuling <mikey@neuling.org> | 2018-04-11 13:25:08 +1000 |
|---|---|---|
| committer | Stewart Smith <stewart@linux.ibm.com> | 2018-04-11 17:59:57 -0500 |
| commit | 00521231c8260a5c5ec3389aa79394708a9b98ce (patch) | |
| tree | cd0e81ed035ef225d355b689511bf78df1c83449 /include | |
| parent | d15e2e5ef92f5e79f90ac06a8a3b848881886005 (diff) | |
| download | talos-skiboot-00521231c8260a5c5ec3389aa79394708a9b98ce.tar.gz talos-skiboot-00521231c8260a5c5ec3389aa79394708a9b98ce.zip | |
phb4: Restore bus numbers after CRS
Currently we restore PCIe bus numbers right after the link is
up. Unfortunately as this point we haven't done CRS so config space
may not be accessible.
This moves the bus number restore till after CRS has happened.
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/pci.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/pci.h b/include/pci.h index 0c2858c8..6141159f 100644 --- a/include/pci.h +++ b/include/pci.h @@ -436,6 +436,7 @@ extern int64_t pci_find_ecap(struct phb *phb, uint16_t bdfn, uint16_t cap, uint8_t *version); extern void pci_init_capabilities(struct phb *phb, struct pci_device *pd); extern bool pci_wait_crs(struct phb *phb, uint16_t bdfn, uint32_t *out_vdid); +extern void pci_restore_slot_bus_configs(struct pci_slot *slot); extern void pci_device_init(struct phb *phb, struct pci_device *pd); extern struct pci_device *pci_walk_dev(struct phb *phb, struct pci_device *pd, |
