diff options
| author | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2014-10-15 13:44:23 +1100 |
|---|---|---|
| committer | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2014-10-15 14:45:27 +1100 |
| commit | 8463764f7e4383e1e2339eee174d4151337bc467 (patch) | |
| tree | 56db78dfd6b9a8df3d8045292c631030f22232c7 /include/ast.h | |
| parent | a9efc5faa0ef2d8126a8a217a3f9f806071fe1db (diff) | |
| download | talos-skiboot-8463764f7e4383e1e2339eee174d4151337bc467.tar.gz talos-skiboot-8463764f7e4383e1e2339eee174d4151337bc467.zip | |
libflash: Sync with pflash 0.8.3
Fixes 64MB chip support, improve Macronix settings, add Micron
chip support, etc...
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'include/ast.h')
| -rw-r--r-- | include/ast.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/include/ast.h b/include/ast.h index f97aa449..efc898da 100644 --- a/include/ast.h +++ b/include/ast.h @@ -23,12 +23,14 @@ /* SPI Flash controller #1 (BMC) */ #define BMC_SPI_FCTL_BASE 0x1E620000 #define BMC_SPI_FCTL_CTRL (BMC_SPI_FCTL_BASE + 0x10) +#define BMC_SPI_FREAD_TIMING (BMC_SPI_FCTL_BASE + 0x94) #define BMC_FLASH_BASE 0x20000000 /* SPI Flash controller #2 (PNOR) */ #define PNOR_SPI_FCTL_BASE 0x1E630000 #define PNOR_SPI_FCTL_CONF (PNOR_SPI_FCTL_BASE + 0x00) #define PNOR_SPI_FCTL_CTRL (PNOR_SPI_FCTL_BASE + 0x04) +#define PNOR_SPI_FREAD_TIMING (PNOR_SPI_FCTL_BASE + 0x14) #define PNOR_FLASH_BASE 0x30000000 /* LPC registers */ @@ -45,6 +47,10 @@ #define VUART1_ADDRL (VUART1_BASE + 0x28) #define VUART1_ADDRH (VUART1_BASE + 0x2c) +/* SCU registers */ +#define SCU_BASE 0x1e6e2000 +#define SCU_HW_STRAPPING (SCU_BASE + 0x70) + /* * AHB Accessors */ |
