diff options
| author | Gavin Shan <gwshan@linux.vnet.ibm.com> | 2017-03-30 10:05:27 +1100 |
|---|---|---|
| committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2017-03-31 16:57:07 +1100 |
| commit | b878b6828f5b6defd7e5e8b5da38978fda235081 (patch) | |
| tree | d07835a916116f80f15f20811fdee997cf1f8bcc /hw | |
| parent | 3170dd74cefeae5fa6b65b2b8f99dd54ca06d249 (diff) | |
| download | talos-skiboot-b878b6828f5b6defd7e5e8b5da38978fda235081.tar.gz talos-skiboot-b878b6828f5b6defd7e5e8b5da38978fda235081.zip | |
hw/phb4: Locate AER capability position if necessary
Similar to PHB3, phb4_init_rc_cfg() can be called when the PHB is
initialized or reinitialized after complete reset. In the later case,
we needn't locate the AER capability position again and the cached
position can be used as we do for PCIe capability. So several CPU
cycles can be saved. The error message is shortened and meaningless
comment is dropped as well.
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'hw')
| -rw-r--r-- | hw/phb4.c | 15 |
1 files changed, 9 insertions, 6 deletions
@@ -2512,13 +2512,16 @@ static bool phb4_init_rc_cfg(struct phb4 *p) * * AER inits */ - aercap = pci_find_ecap(&p->phb, 0, PCIECAP_ID_AER, NULL); - if (aercap < 0) { - /* Shouldn't happen */ - PHBERR(p, "Failed to locate AER Ecapability in bridge\n"); - return false; + if (p->aercap <= 0) { + aercap = pci_find_ecap(&p->phb, 0, PCIECAP_ID_AER, NULL); + if (aercap < 0) { + PHBERR(p, "Can't locate AER capability\n"); + return false; + } + p->aercap = aercap; + } else { + aercap = p->aercap; } - p->aercap = aercap; /* Clear all UE status */ phb4_pcicfg_write32(&p->phb, 0, aercap + PCIECAP_AER_UE_STATUS, |
