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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2016-12-22 14:17:06 +1100
committerStewart Smith <stewart@linux.vnet.ibm.com>2017-01-05 15:41:02 +1100
commit6c04819e1d53581dffee4008a531707681806da7 (patch)
tree69dced2429078c13903326906061edf7428b2f46 /hw
parente582a45aadb9b74ee074ee8395675430bbb01104 (diff)
downloadtalos-skiboot-6c04819e1d53581dffee4008a531707681806da7.tar.gz
talos-skiboot-6c04819e1d53581dffee4008a531707681806da7.zip
xive: Improve/fix EOI of LSIs
Don't try to play games with PQ bits with LSIs, use the normal EOI loads instead as otherwise things won't work on P9 DD1 with PHB4 due to erratas on all non-EOI ESB operations. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'hw')
-rw-r--r--hw/xive.c31
1 files changed, 19 insertions, 12 deletions
diff --git a/hw/xive.c b/hw/xive.c
index 5b9d1d80..5d1744d6 100644
--- a/hw/xive.c
+++ b/hw/xive.c
@@ -2383,20 +2383,27 @@ static void xive_source_eoi(struct irq_source *is, uint32_t isn)
* a clear of both P and Q and returns the old Q.
*
* This allows us to then do a re-trigger if Q was set
- rather than synthetizing an interrupt in software
- */
+ * rather than synthetizing an interrupt in software
+ */
if (s->flags & XIVE_SRC_EOI_PAGE1)
mmio_base += 1ull << (s->esb_shift - 1);
- offset = 0xc00;
- if (s->flags & XIVE_SRC_SHIFT_BUG)
- offset <<= 4;
- eoi_val = in_be64(mmio_base + offset);
- xive_vdbg(s->xive, "ISN: %08x EOI=%llx\n", isn, eoi_val);
- if ((s->flags & XIVE_SRC_LSI) || !(eoi_val & 1))
- return;
-
- /* Re-trigger always on page0 or page1 ? */
- out_be64(mmio_base, 0);
+
+ /* LSIs don't need anything special, just EOI */
+ if (s->flags & XIVE_SRC_LSI)
+ in_be64(mmio_base);
+ else {
+ offset = 0xc00;
+ if (s->flags & XIVE_SRC_SHIFT_BUG)
+ offset <<= 4;
+ eoi_val = in_be64(mmio_base + offset);
+ xive_vdbg(s->xive, "ISN: %08x EOI=%llx\n",
+ isn, eoi_val);
+ if (!(eoi_val & 1))
+ return;
+
+ /* Re-trigger always on page0 or page1 ? */
+ out_be64(mmio_base, 0);
+ }
}
}
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