diff options
| author | Gavin Shan <gwshan@linux.vnet.ibm.com> | 2017-03-30 10:05:26 +1100 |
|---|---|---|
| committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2017-03-31 16:57:07 +1100 |
| commit | 3170dd74cefeae5fa6b65b2b8f99dd54ca06d249 (patch) | |
| tree | 2c4c6aabf07ea41f88fe7a9bbcdac58982e510e3 /hw | |
| parent | 7c4a326bea502fc1f3b8b767f6ff9c02b7d1b254 (diff) | |
| download | talos-skiboot-3170dd74cefeae5fa6b65b2b8f99dd54ca06d249.tar.gz talos-skiboot-3170dd74cefeae5fa6b65b2b8f99dd54ca06d249.zip | |
hw/phb3: Locate AER capability position if necessary
phb3_init_rc_cfg() can be called when the PHB is initialized or
reinitialized after complete reset. In the later case, we needn't
locate the AER capability position again and the cached position
can be used as we do for PCIe capability. So several CPU cycles
can be saved. The error message is shortened and meaningless
comment is dropped.
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'hw')
| -rw-r--r-- | hw/phb3.c | 15 |
1 files changed, 9 insertions, 6 deletions
@@ -4056,13 +4056,16 @@ static bool phb3_init_rc_cfg(struct phb3 *p) * * AER inits */ - aercap = pci_find_ecap(&p->phb, 0, PCIECAP_ID_AER, NULL); - if (aercap < 0) { - /* Shouldn't happen */ - PHBERR(p, "Failed to locate AER Ecapability in bridge\n"); - return false; + if (p->aercap <= 0) { + aercap = pci_find_ecap(&p->phb, 0, PCIECAP_ID_AER, NULL); + if (aercap < 0) { + PHBERR(p, "Can't locate AER capability\n"); + return false; + } + p->aercap = aercap; + } else { + aercap = p->aercap; } - p->aercap = aercap; /* Clear all UE status */ phb3_pcicfg_write32(&p->phb, 0, aercap + PCIECAP_AER_UE_STATUS, |
