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| author | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2017-01-15 22:36:23 -0600 |
|---|---|---|
| committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2017-02-02 18:22:40 +1100 |
| commit | 0b006637dc3a26f94a562d67bd49560b7779595e (patch) | |
| tree | 68eb8e9b8c078d02ab437314972904c8855ae2f0 /hw | |
| parent | 11cf409be293091470b3f75619416e2bb2697265 (diff) | |
| download | talos-skiboot-0b006637dc3a26f94a562d67bd49560b7779595e.tar.gz talos-skiboot-0b006637dc3a26f94a562d67bd49560b7779595e.zip | |
xive: Fix PIR2VP_BLK for 2-chip systems
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'hw')
| -rw-r--r-- | hw/xive.c | 11 |
1 files changed, 10 insertions, 1 deletions
@@ -413,6 +413,15 @@ static struct dt_node *xive_dt_node; static uint32_t xive_block_to_chip[XIVE_MAX_CHIPS]; static uint32_t xive_block_count; +static uint32_t xive_chip_to_block(uint32_t chip_id) +{ + struct proc_chip *c = get_chip(chip_id); + + assert(c); + assert(c->xive); + return c->xive->block_id; +} + /* Conversion between GIRQ and block/index. * * ------------------------------------ @@ -443,7 +452,7 @@ static uint32_t xive_block_count; /* Routing of physical processors to VPs */ #ifdef USE_BLOCK_GROUP_MODE #define PIR2VP_IDX(__pir) (0x80 | P9_PIR2LOCALCPU(__pir)) -#define PIR2VP_BLK(__pir) (P9_PIR2GCID(__pir)) +#define PIR2VP_BLK(__pir) (xive_chip_to_block(P9_PIR2GCID(__pir))) #define VP2PIR(__blk, __idx) (P9_PIRFROMLOCALCPU(VC_BLK_TO_CHIP(__blk), (__idx) & 0x7f)) #else #define PIR2VP_IDX(__pir) (0x800 | (P9_PIR2GCID(__pir) << 7) | P9_PIR2LOCALCPU(__pir)) |
