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authorAnanth N Mavinakayanahalli <ananth@in.ibm.com>2014-07-24 11:47:05 +0530
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2014-07-25 14:10:51 +1000
commitcf9dfca958188444079d2de9a26f80f2c4e97051 (patch)
tree07630c72237f1964d00cedade154765c55090c5a /hw/psi.c
parentcad0d16e236bcbf457406023d5df4da8d55b778f (diff)
downloadtalos-skiboot-cf9dfca958188444079d2de9a26f80f2c4e97051.tar.gz
talos-skiboot-cf9dfca958188444079d2de9a26f80f2c4e97051.zip
FSP/PSI: Drive FSP reset on HIR
Currently, we drive the link down when doing a host initated reset. We should ideally reset the FSP and let it bring the link down. Signed-off-by: Ananth N Mavinakayanahalli <ananth@in.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'hw/psi.c')
-rw-r--r--hw/psi.c21
1 files changed, 21 insertions, 0 deletions
diff --git a/hw/psi.c b/hw/psi.c
index 6d92362a..8e46207d 100644
--- a/hw/psi.c
+++ b/hw/psi.c
@@ -52,6 +52,27 @@ void psi_set_link_polling(bool active)
psi_link_poll_active = active;
}
+/*
+ * Send an encoded reset sequence to the FSP. We should get a PSI interrupt
+ * soon after.
+ */
+void psi_reset_fsp(struct psi *psi)
+{
+ lock(&psi_lock);
+
+ if (psi->active) {
+ u64 reg;
+
+ printf("PSI: Driving FSP reset via PSI\n");
+ reg = in_be64(psi->regs + PSIHB_CR);
+ reg &= ~(0xfffull << 20); /* Reset error bits */
+ reg |= PSIHB_CR_FSP_RESET; /* Send FSP reset sequence */
+ printf("PSI[0x%03x]: PSIHBCR set to %llx\n",
+ psi->chip_id, in_be64(psi->regs + PSIHB_CR));
+ }
+ unlock(&psi_lock);
+}
+
void psi_disable_link(struct psi *psi)
{
lock(&psi_lock);
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