diff options
author | Frederic Barrat <fbarrat@linux.vnet.ibm.com> | 2018-03-23 17:33:37 +0100 |
---|---|---|
committer | Stewart Smith <stewart@linux.ibm.com> | 2018-04-11 17:59:57 -0500 |
commit | 943a1aff363ed011643077bb976263cb28daf789 (patch) | |
tree | 04c5016bf7db91c330d2fdab246ee7ea4d1bab33 /hw/phb4.c | |
parent | 9067098cfef9ec3a5b637e1015359d1fcd71cb8b (diff) | |
download | talos-skiboot-943a1aff363ed011643077bb976263cb28daf789.tar.gz talos-skiboot-943a1aff363ed011643077bb976263cb28daf789.zip |
npu2-opencapi: Fix 'link internal error' FIR, take 2
When setting up an opencapi link, we set the transport muxes first,
then set the PHY training config register, which includes disabling
nvlink mode for the bricks. That's the order of the init sequence, as
found in the NPU workbook.
In reality, doing so works, but it raises 2 FIR bits in the PowerBus
OLL FIR Register for the 2 links when we configure the transport
muxes. Presumably because nvlink is not disabled yet and we are
configuring the transport muxes for opencapi.
bit 60: link0 internal error
bit 61: link1 internal error
Overall the current setup ends up being correct and everything works,
but we raise 2 FIR bits.
So tweak the order of operations to disable nvlink before configuring
the transport muxes. Incidentally, this is what the scripts from the
opencapi enablement team were doing all along.
Signed-off-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com>
Acked-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
Diffstat (limited to 'hw/phb4.c')
0 files changed, 0 insertions, 0 deletions