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authorAlistair Popple <alistair@popple.id.au>2017-03-24 12:22:23 +1100
committerStewart Smith <stewart@linux.vnet.ibm.com>2017-03-30 19:37:48 +1100
commitd8c880ecc2c8308395e51e28b12fb19a826dc0f6 (patch)
tree10f6627ea89d7200c1201d483e41e3c6d9f7313b /hw/Makefile.inc
parent98509ad54e14fe524ef0833a1bde35547ba2785f (diff)
downloadtalos-skiboot-d8c880ecc2c8308395e51e28b12fb19a826dc0f6.tar.gz
talos-skiboot-d8c880ecc2c8308395e51e28b12fb19a826dc0f6.zip
Introduce NPU2 support
NVLink2 is a new feature introduced on POWER9 systems. It is an evolution of of the NVLink1 feature included in POWER8+ systems but adds several new features including support for GPU address translation using the Nest MMU and cache coherence. Similar to NVLink1 the functionality is exposed to the OS as a series of virtual PCIe devices. However the actual hardware interfaces are significantly different which limits the amount of common code that can be shared between implementations in the firmware. This patch adds basic hardware initialisation and exposure of the virtual NVLink2 PCIe devices to the running OS. Signed-off-by: Alistair Popple <alistair@popple.id.au> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'hw/Makefile.inc')
-rw-r--r--hw/Makefile.inc2
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/Makefile.inc b/hw/Makefile.inc
index d87f85e4..bcddcf04 100644
--- a/hw/Makefile.inc
+++ b/hw/Makefile.inc
@@ -6,7 +6,7 @@ HW_OBJS += nx.o nx-rng.o nx-crypto.o nx-842.o
HW_OBJS += p7ioc.o p7ioc-inits.o p7ioc-phb.o
HW_OBJS += phb3.o sfc-ctrl.o fake-rtc.o bt.o p8-i2c.o prd.o
HW_OBJS += dts.o lpc-rtc.o npu.o npu-hw-procedures.o xive.o phb4.o
-HW_OBJS += fake-nvram.o lpc-mbox.o
+HW_OBJS += fake-nvram.o lpc-mbox.o npu2.o
HW=hw/built-in.o
# FIXME hack this for now
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