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authorBalbir Singh <bsingharora@gmail.com>2018-04-18 14:35:21 +1000
committerStewart Smith <stewart@linux.ibm.com>2018-04-19 23:51:02 -0500
commitbdd925aabbbbf0d35a44d85c9d51809c668be1ba (patch)
treebff4b24e7a43561d40afdea40682406ad94556c5 /external
parent0a4d0519a5a23ac11e06c3fc67fb04035716374f (diff)
downloadtalos-skiboot-bdd925aabbbbf0d35a44d85c9d51809c668be1ba.tar.gz
talos-skiboot-bdd925aabbbbf0d35a44d85c9d51809c668be1ba.zip
mambo/mambo_utils.tcl: Inject an MCE at a specified address
Currently we don't support injecting an MCE on a specific address. This is useful for testing functionality like memcpy_mcsafe() (see https://patchwork.ozlabs.org/cover/893339/) The core of the functionality is a routine called inject_mce_ue_on_addr, which takes an addr argument and injects an MCE (load/store with UE) when the specified address is accessed by code. This functionality can easily be enhanced to cover instruction UE's as well. A sample use case to create an MCE on stack access would be set addr [mysim display gpr 1] inject_mce_ue_on_addr $addr This would cause an mce on any r1 or r1 based access Signed-off-by: Balbir Singh <bsingharora@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
Diffstat (limited to 'external')
-rw-r--r--external/mambo/mambo_utils.tcl16
1 files changed, 15 insertions, 1 deletions
diff --git a/external/mambo/mambo_utils.tcl b/external/mambo/mambo_utils.tcl
index 6cbb222a..54b367c4 100644
--- a/external/mambo/mambo_utils.tcl
+++ b/external/mambo/mambo_utils.tcl
@@ -453,7 +453,8 @@ proc mce_trigger { args } {
#
# Default with no arguments is a recoverable i-side TLB multi-hit
# Other options:
-# d_side=1 cause=0x80 - recoverable d-side SLB multi-hit
+# d_side=1 dsisr=0x80 - recoverable d-side SLB multi-hit
+# d_side=1 dsisr=0x8000 - ue error on instruction fetch
# d_side=0 cause=0xd - unrecoverable i-side async store timeout (POWER9 only)
# d_side=0 cause=0x1 - unrecoverable i-side ifetch
#
@@ -547,6 +548,19 @@ proc inject_mce { } {
mysim trigger clear pc $pc ; list
}
+#
+# We've stopped at addr and we need to inject the mce and continue
+#
+proc trigger_mce_ue_addr {args} {
+ set addr [lindex [lindex $args 0] 1]
+ mysim trigger clear memory system rw $addr $addr
+ exc_mce 0x1 0x8000 0x1
+}
+
+proc inject_mce_ue_on_addr {addr} {
+ mysim trigger set memory system rw $addr $addr 1 "trigger_mce_ue_addr"
+}
+
# inject and step over one instruction, and repeat.
proc inject_mce_step { {nr 1} } {
for { set i 0 } { $i < $nr } { incr i 1 } {
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