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authorFrederic Barrat <fbarrat@linux.vnet.ibm.com>2018-03-23 17:33:37 +0100
committerStewart Smith <stewart@linux.ibm.com>2018-04-11 17:59:57 -0500
commit943a1aff363ed011643077bb976263cb28daf789 (patch)
tree04c5016bf7db91c330d2fdab246ee7ea4d1bab33
parent9067098cfef9ec3a5b637e1015359d1fcd71cb8b (diff)
downloadtalos-skiboot-943a1aff363ed011643077bb976263cb28daf789.tar.gz
talos-skiboot-943a1aff363ed011643077bb976263cb28daf789.zip
npu2-opencapi: Fix 'link internal error' FIR, take 2
When setting up an opencapi link, we set the transport muxes first, then set the PHY training config register, which includes disabling nvlink mode for the bricks. That's the order of the init sequence, as found in the NPU workbook. In reality, doing so works, but it raises 2 FIR bits in the PowerBus OLL FIR Register for the 2 links when we configure the transport muxes. Presumably because nvlink is not disabled yet and we are configuring the transport muxes for opencapi. bit 60: link0 internal error bit 61: link1 internal error Overall the current setup ends up being correct and everything works, but we raise 2 FIR bits. So tweak the order of operations to disable nvlink before configuring the transport muxes. Incidentally, this is what the scripts from the opencapi enablement team were doing all along. Signed-off-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com> Acked-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
-rw-r--r--hw/npu2-opencapi.c29
1 files changed, 25 insertions, 4 deletions
diff --git a/hw/npu2-opencapi.c b/hw/npu2-opencapi.c
index 35ea0108..91b5c054 100644
--- a/hw/npu2-opencapi.c
+++ b/hw/npu2-opencapi.c
@@ -134,6 +134,30 @@ static uint64_t get_odl_status(uint32_t gcid, uint64_t index) {
return reg;
}
+static void disable_nvlink(uint32_t gcid, int index)
+{
+ uint64_t phy_config_scom, reg;
+
+ switch (index) {
+ case 2:
+ case 3:
+ phy_config_scom = OBUS_LL0_IOOL_PHY_CONFIG;
+ break;
+ case 4:
+ case 5:
+ phy_config_scom = OBUS_LL3_IOOL_PHY_CONFIG;
+ break;
+ default:
+ assert(false);
+ }
+ /* Disable NV-Link link layers */
+ xscom_read(gcid, phy_config_scom, &reg);
+ reg &= ~OBUS_IOOL_PHY_CONFIG_NV0_NPU_ENABLED;
+ reg &= ~OBUS_IOOL_PHY_CONFIG_NV1_NPU_ENABLED;
+ reg &= ~OBUS_IOOL_PHY_CONFIG_NV2_NPU_ENABLED;
+ xscom_write(gcid, phy_config_scom, reg);
+}
+
/* Procedure 13.1.3.1 - select OCAPI vs NVLink for bricks 2-3/4-5 */
static void set_transport_mux_controls(uint32_t gcid, uint32_t scom_base,
@@ -273,10 +297,6 @@ static void enable_odl_phy_mux(uint32_t gcid, int index)
reg &= ~OBUS_IOOL_PHY_CONFIG_LINK0_OLL_ENABLED;
reg &= ~OBUS_IOOL_PHY_CONFIG_LINK1_OLL_ENABLED;
- /* Disable NV-Link link layers */
- reg &= ~OBUS_IOOL_PHY_CONFIG_NV0_NPU_ENABLED;
- reg &= ~OBUS_IOOL_PHY_CONFIG_NV1_NPU_ENABLED;
- reg &= ~OBUS_IOOL_PHY_CONFIG_NV2_NPU_ENABLED;
xscom_write(gcid, phy_config_scom, reg);
}
@@ -497,6 +517,7 @@ static void brick_config(uint32_t gcid, uint32_t scom_base, int index)
* We assume at this point that the PowerBus Hotplug Mode Control
* register is correctly set by Hostboot
*/
+ disable_nvlink(gcid, index);
set_transport_mux_controls(gcid, scom_base, index,
NPU2_DEV_TYPE_OPENCAPI);
enable_odl_phy_mux(gcid, index);
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