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author | Xo Wang <xow@google.com> | 2016-09-22 16:34:37 -0700 |
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committer | Patrick Williams <patrick@stwcx.xyz> | 2016-10-04 03:01:53 +0000 |
commit | c1ce68b3df3e63a6eef2b9b3c0ff8b176a40df01 (patch) | |
tree | 196aec25a5a1e53368f96cbd3f0c990a99ddd5af /hostwatchdog | |
parent | 20a194169c527fbded95749acd29ef44dfbe70c7 (diff) | |
download | talos-skeleton-c1ce68b3df3e63a6eef2b9b3c0ff8b176a40df01.tar.gz talos-skeleton-c1ce68b3df3e63a6eef2b9b3c0ff8b176a40df01.zip |
pwrctl: Add latch output to power control
On the Zaius machine, the BMC signals that power up the CPU are gated by
a latch to protect against GPIO blips during BMC reset/power loss.
This adds an optional power GPIO configuration that controls the latch's
enable pin. Its behavior is to assert high when the op-pwrctl runs,
allowing power_up lines to propagate past their latches.
Signed-off-by: Xo Wang <xow@google.com>
Change-Id: Ibf0d1db771033cb9bba82575cca1bd21cfb3ad3d
Diffstat (limited to 'hostwatchdog')
0 files changed, 0 insertions, 0 deletions