1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
|
/*
* @file: ppe/sbe/sbefw/sbefifo.H
*
* @brief This file contains the SBE FIFO Commands
*
*/
#ifndef __SBEFW_SBEFIFO_H
#define __SBEFW_SBEFIFO_H
#include "sbeexeintf.H"
#include "sbetrace.H"
#include "ppe42_scom.h"
#include "sbe_sp_intf.H"
#include "sbeSpMsg.H"
/**
* @brief SBE FIFO Access addresses
*
*/
const uint32_t SBE_FIFO_BASE = 0x000B0000;
const uint32_t SBE_UPSTREAM_FIFO_DEQ_ADD = SBE_FIFO_BASE + 0x0000;
const uint32_t SBE_UPSTREAM_FIFO_STATUS = SBE_FIFO_BASE + 0x0001;
const uint32_t SBE_UPSTREAM_FIFO_SIGNAL_EOT = SBE_FIFO_BASE + 0x0002;
const uint32_t SBE_UPSTREAM_FIFO_REQ_RESET = SBE_FIFO_BASE + 0x0003;
const uint32_t SBE_UPSTREAM_FIFO_PERFORM_RESET = SBE_FIFO_BASE + 0x0004;
const uint32_t SBE_UPSTREAM_FIFO_ACK_EOT = SBE_FIFO_BASE + 0x0005;
const uint32_t SBE_DOWNSTREAM_FIFO_ENQ_ADD = SBE_FIFO_BASE + 0x0010;
const uint32_t SBE_DOWNSTREAM_FIFO_STATUS = SBE_FIFO_BASE + 0x0011;
const uint32_t SBE_DOWNSTREAM_FIFO_SIGNAL_EOT = SBE_FIFO_BASE + 0x0012;
const uint32_t SBE_DOWNSTREAM_FIFO_REQ_RESET = SBE_FIFO_BASE + 0x0013;
const uint32_t SBE_DOWNSTREAM_FIFO_PERFORM_RESET = SBE_FIFO_BASE + 0x0014;
const uint32_t SBE_DOWNSTREAM_FIFO_ACK_EOT = SBE_FIFO_BASE + 0x0015;
/**
* @brief SBE Upstream FIFO Status bits
*
*/
typedef struct
{
uint32_t valid_flag:1; // Bit 0
uint32_t eot_flag:1; // Bit 1
uint32_t parity_err:1; // Bit 2
uint32_t reserved3_5:3; // Bit 3:5
uint32_t req_upfifo_reset:1; // Bit 6
uint32_t req_downfifo_reset:1; // Bit 7
uint32_t signaling_eot:1; // Bit 8
uint32_t reserved9:1; // Bit 9
uint32_t fifo_full:1; // Bit 10
uint32_t fifo_empty:1; // Bit 11
uint32_t fifo_entry_count:4; // Bit 12:15
uint32_t fifo_valid_flags:8; // Bit 16:23
uint32_t fifo_eot_flags:8; // Bit 24:31
} sbe_upfifo_status_bitset_t ;
typedef union
{
sbe_upfifo_status_bitset_t upfifo_status_bitset;
uint32_t upfifo_status_uint32;
} sbe_upfifo_status_t;
/**
* @brief FIFO access return codes for internal purpose
*
*/
typedef enum
{
SBE_FIFO_RC_ACCESS_SUCCESS = 0,
SBE_FIFO_RC_RESET = 0xE0,
SBE_FIFO_RC_FULL,
SBE_FIFO_RC_EMPTY,
SBE_FIFO_RC_DUMMY_DATA,
SBE_FIFO_RC_EOT_ACKED,
SBE_FIFO_RC_EOT_ACK_FAILED,
SBE_FIFO_RC_UNKNOWN,
} sbe_fifo_access_rc_t;
/**
* @brief 64-bit DW structure for Upstream FIFO Read
*
*/
typedef struct
{
uint32_t upfifo_data;
sbe_upfifo_status_t upfifo_status;
} sbe_upfifo_entry_t ;
/**
* @brief SBE Downstream FIFO Status bits
*
*/
typedef struct
{
uint32_t reserved0_1:2; // Bit 0:1
uint32_t parity_err:1; // Bit 2
uint32_t reserved3_5:3; // Bit 3:5
uint32_t req_downfifo_reset:1; // Bit 6
uint32_t req_upfifo_reset:1; // Bit 7
uint32_t signaling_eot:1; // Bit 8
uint32_t reserved9:1; // Bit 9
uint32_t fifo_full:1; // Bit 10
uint32_t fifo_empty:1; // Bit 11
uint32_t fifo_entry_count:4; // Bit 12:15
uint32_t fifo_valid_flags:8; // Bit 16:23
uint32_t fifo_eot_flags:8; // Bit 24:31
} sbe_downfifo_status_bitset_t ;
typedef union
{
sbe_downfifo_status_bitset_t downfifo_status_bitset;
uint32_t downfifo_status_uint32;
} sbe_downfifo_status_t;
/*****************************************************************/
/** Upstream FIFO access utilities **/
/*****************************************************************/
/**
* @brief sbeUpFifoDeq : Read entry and status from Upstream FIFO
*
* @param[out] 64-Bit Data read from Upstream FIFO
*
* @return Rc from the underlying scom utility
*
*/
extern inline uint32_t sbeUpFifoDeq (uint64_t *o_data)
{
/* For SBE FIFO (PIB) access, chiplet ID should be passed as 0 */
return getscom(0, SBE_UPSTREAM_FIFO_DEQ_ADD, o_data);
}
/**
* @brief sbeUpFifoPerformReset : Perform Upstream FIFO reset request
*
* @return Rc from the underlying scom utility
*
*/
extern inline uint32_t sbeUpFifoPerformReset (void)
{
SBE_TRACE(">sbeUpFifoPerformReset");
return putscom(0, SBE_UPSTREAM_FIFO_PERFORM_RESET, ((uint64_t)0x1)<<32);
}
/**
* @brief sbeUpFifoAckEot : Acknowledge EOT in Upstream FIFO
*
* @return Rc from the underlying scom utility
*
*/
extern inline uint32_t sbeUpFifoAckEot (void)
{
SBE_DEBUG("sbeUpFifoAckEot");
return putscom(0, SBE_UPSTREAM_FIFO_ACK_EOT, ((uint64_t)0x1)<<32);
}
/*****************************************************************/
/** Downstream FIFO access utilities **/
/*****************************************************************/
/**
* @brief sbeDownFifoEnq : Write data into Downstream FIFO
*
* @param[in] 64-Bit Data write into Downstream FIFO
* Bit 0-31 : Data
* Bit 32-63 : Unused
*
* @return Rc from the underlying scom utility
*/
extern inline uint32_t sbeDownFifoEnq (const uint64_t i_data)
{
SBE_DEBUG(">sbeDownFifoEnq");
return putscom(0, SBE_DOWNSTREAM_FIFO_ENQ_ADD, i_data);
}
/**
* @brief sbeDownFifoGetStatus : Read status from downstream FIFO
*
* @param[out] 64-Bit Read status from downstream FIFO
* Bit 0-31 : Data
* Bit 32-63 : Unused
*
* @return Rc from the underlying scom utility
*/
extern inline uint32_t sbeDownFifoGetStatus (uint64_t *o_data)
{
SBE_DEBUG(">sbeDownFifoStatus");
return getscom(0, SBE_DOWNSTREAM_FIFO_STATUS, o_data);
}
/**
* @brief sbeDownFifoSignalEot : Signal EOT in Downstream FIFO
*
* @return Rc from the underlying scom utility
*
*/
extern inline uint32_t sbeDownFifoSignalEot (void)
{
SBE_DEBUG(">sbeDownFifoSignalEot");
return putscom(0, SBE_DOWNSTREAM_FIFO_SIGNAL_EOT, ((uint64_t)0x1)<<32);
}
/**********************************************************************/
// Utilities
/**********************************************************************/
/**
* @brief sbeUpFifoDeq_mult : Dequeue multiple entries from upstream FIFO
*
* @param[in/out] io_len
* number of entries to dequeue as input,
* number of entries dequeued as output without
* taking EOT dummy entry into consideration
* @param[out] o_pData entries dequeued into the buffer
* @param[in] i_flush true / false
* true - caller requested FIFO flush,
* io_len would be returned as 0
* false - default case,
* io_len would be number of entries dequeued
*
* @return Rc from the underlying scom utility
*
*/
extern uint32_t sbeUpFifoDeq_mult (uint8_t &io_len,
uint32_t *o_pData,
const bool i_flush = false);
/**
* @brief sbeDownFifoEnq_mult : Enqueue into downstream FIFO
*
* @param[in/out] io_len number of entries to enqueue as input,
* number of entries enqueued as output
* @param[in] i_pData buffer containting data to be enqueued
*
* @return Rc from the underlying scom utility
*
*/
extern uint32_t sbeDownFifoEnq_mult (uint8_t &io_len,
const uint32_t *i_pData) ;
/**
* @brief sbeBuildRespHeaderMagicCodeCmdClass
* Builds the header word containing the magic code,
* the command class and the opcode
*
* @return Returns the header word in the response header
* containing the magic code, command class and opcode
*
*/
extern inline uint32_t sbeBuildRespHeaderMagicCodeCmdClass (void)
{
return ( (0xC0DE0000 ) |
(uint32_t)(g_sbeCmdHdr.cmdClass << 8) |
(uint32_t)(g_sbeCmdHdr.command ));
}
/**
* @brief sbeBuildRespHeaderStatusWordGlobal
* Builds the status header word from global variables
*
* @return Returns the status word in the response header
*
*/
extern inline uint32_t sbeBuildRespHeaderStatusWordGlobal (void)
{
return ( (((uint32_t)g_sbeCmdRespHdr.prim_status)<<16) |
(g_sbeCmdRespHdr.sec_status) );
}
/**
* @brief sbeBuildRespHeaderStatusWordLocal
* Builds the status header word from passed in parameters
*
* @param[in] const uint16_t i_primStatus Primary Response Status Code
* @param[in] const uint16_t i_secStatus Secondary Response Status Code
*
* @return Returns the status word in the response header
*
*/
extern inline uint32_t sbeBuildRespHeaderStatusWordLocal (
const uint16_t i_primStatus,
const uint16_t i_secStatus)
{
return ( (((uint32_t)i_primStatus)<<16) | (i_secStatus) );
}
/**
* @brief sbeBuildMinRespHdr : Builds minimum response header
*
* @desc This builds the buffer with the following status words
* - Magic Bytes, Command Class, Command opcode
* - Primary Status Code, Secondary Status Code
* - PCB / PIB Status Code [optional]
* - Distance to Status Header
* @param[in/out] uint32_t *io_pBuf Buffer to be filled in
* @param[in/out] uint8_t &io_curIndex Current Index into the buffer
* @param[in] const uint16_t i_primStatus Primary Response Status Code
* @param[in] const uint16_t i_secStatus Secondary Response Status Code
* @param[in] const uint32_t i_pcbpibStatus PCB-PIB Response Status Code
* @param[in] const uint8_t i_startIndex Starting Index into the buffer
*/
void sbeBuildMinRespHdr ( uint32_t *io_pBuf,
uint8_t &io_curIndex,
const uint16_t i_primStatus,
const uint16_t i_secStatus,
const uint32_t i_pcbpibStatus,
const uint8_t i_startIndex = 0 );
#endif // __SBEFW_SBEFIFO_H
|