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//------------------------------------------------------------------------------
/// @file p9_sbe_gptr_time_repr_initf.H
///
/// @brief Scan 0 and Load repair , time and GPTR rings for all enabled chiplets
// *!
// *! OWNER NAME : Abhishek Agarwal Email: abagarw8@in.ibm.com
// *! BACKUP NAME : Email:
//------------------------------------------------------------------------------
// *HWP HWP Owner : Abhishek Agarwal <abagarw8@in.ibm.com>
// *HWP FW Owner : Brian Silver <bsilver@us.ibm.com>
// *HWP Team : Perv
// *HWP Level : 1
// *HWP Consumed by : SBE
//------------------------------------------------------------------------------
#ifndef _P9_SBE_GPTR_TIME_REPR_INITF_H_
#define _P9_SBE_GPTR_TIME_REPR_INITF_H_
#include <fapi2.H>
typedef fapi2::ReturnCode (*p9_sbe_gptr_time_repr_initf_FP_t)(
const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> &);
/// @brief Scan 0 all rings on all enabled chiplets (except for TP)
/// Load Repair, Time and GPTR rings for all enabled chiplets
/// -- All chip customization data is within the repair and time rings -- array repair, DTS setting
///
/// @param[in] i_target_chip Reference to TARGET_TYPE_PROC_CHIP target
/// @return FAPI2_RC_SUCCESS if success, else error code.
extern "C"
{
fapi2::ReturnCode p9_sbe_gptr_time_repr_initf(const
fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> & i_target_chip);
}
#endif
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