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* Updated PSI and TOD regs into whitelistSrikantha Meesala2017-12-071-0/+7
| | | | | | | | | | | | | Change-Id: I5b8afde659b1c9f7c4f527791efaafb88e03380b Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50482 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: SANTOSH BALASUBRAMANIAN <sbalasub@in.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50487 Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
* Adding attribute to turn memory early data onLuke C. Murray2017-12-054-0/+53
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Performance wants a way to turn memory early data on & off using just scoms. Adding one attribute to control all the needed scoms and defaulting everything so that early data is off. For the L3 disable cp_me by default using scom Changing the scom cp_me dial to disable cp_me for all systems after Nimbus DD2.0. This is expected to be the correct setup for most systems. We didn't disable the cp_me at the scan, because the scom can only disable cp_me if ON or allow the scan setting if set OFF. Some systems might want cp_me enabled by only changing a scom. So the default is to set cp_me on at the scan and off a the scom. This way only the scom has to be turned off to enable cp_me. Also update three scoms in the memory controler that are needed for early data. Change-Id: Ib2106ec4b7d26cb084601f2d6eee68833b36d30b CQ: HW426419 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49261 Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49331 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Code restruct: TOR APIClaus Michael Olsen2017-12-0412-1590/+717
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Key_Cronus_Test=XIP_REGRESS Code restructuring aiming at: - utilizing TOR magic header info - enforce a common approach for - extracting metadata for all image,chipType combinations - traversing images for all image,chipType combinations - shrinking code size by reusing common code segments - improve readability by - separating more clearly metadata extraction and image traversal - slight rearrange of certain code segments - remove leftover hardcoded assumptions about ring/TOR data and structs - variables appropriately renamed and now all using camel style Change-Id: I50ace8b2fdb340a97ce6d74ce545c5e1acd21c40 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38863 Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: GIRISANKAR PAULRAJ <gpaulraj@in.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43250 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* p9_pstate_parameter_block: support removal of VFRT VdnPrasad Bg Ranganath2017-12-041-1/+1
| | | | | | | | | | | | | | | | | RTC:179507 Change-Id: Ide07bc963d2b88fa8d95c2f2776a84316d6dac48 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49697 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Prem Shanker Jha <premjha2@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49977 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* p9_mss_eff_grouping -- fix mirrored memory mapping bug introduced by 49290Joe McGill2017-12-041-2/+7
| | | | | | | | | | | | | | | | | | | | | | | p9_fbc_utils.C return each mirorred region as two chunks, to make m.size = nm0.size + nm1.size for Cumulus p9_mss_eff_grouping.C fix off by one error in max region index calculation Change-Id: I79ac3651de048ed83a0eff704b49b25bff9a84cb Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50393 Reviewed-by: Thi N. Tran <thi@us.ibm.com> Dev-Ready: Joseph J. McGill <jmcgill@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: JEREMY R. NEATON <jrneaton@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50397 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Handle security security bit in p9_sbe_attr_setupspashabk-in2017-12-041-20/+38
| | | | | | | | | | | | | | | Fix enabling of security in the current power cycle Change-Id: I546407d90989a876a75b5d36312d31e438024940 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48440 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48444 Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
* Use HCode header timebase frequency for pk traceDoug Gilbert2017-12-043-6/+13
| | | | | | | | | | | | | | | | | Change-Id: I34a9d8d1a003ae6b07b50039a9ea57ff9fd5af4d RTC: 179852 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/46227 Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com> Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Juan R. Medina <jrmedina@us.ibm.com> Dev-Ready: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/46233 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Chip address extension workaround for HW423589 (option2), part1Joe McGill2017-12-0114-60/+396
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | chip_ec_attributes.xml nest_attributes.xml p9_sbe_attributes.xml add ATTR_CHIP_EC_FEATURE_EXTENDED_ADDRESSING_MODE, defines set of chips which physically support the feature add ATTR_CHIP_EC_FEATURE_HW423589_OPTION2, defines set of chips which need extended address workaround for MCD issue (applied only to Nimbus EC 21) add ATTR_MAX_INTERLEAVE_GROUP_SIZE, to restrict maximum size of memory groups formed. Written by p9_mss_eff_grouping. For HW423589_OPTION2, this will default to 512GB add ATTR_FABRIC_ADDR_EXTENSION_[GROUP|CHIP]_ID, to hold extended address configuration. Written by p9_sbe_fabricinit (SBE) and p9_mss_eff_grouping (HB). For HW423589_OPTION2, this will default to 0b0000_111, consuming all chip ID bits for extended addressing. p9_fbc_utils.C p9_fbc_utils.H extend p9_fbc_utils_get_chip_base_address to support address extension, now outputs set of ranges in each msel based on ATTR_FABRIC_ADDR_EXTENSION[GROUP|CHIP]_ID maintain original function for PPE platform which requires knowledge of non-aliased base addresses only, for code size p9_mss_eff_grouping.C p9_mss_eff_grouping_errors.xml set ATTR_FABRIC_ADDR_EXTENSION[GROUP|CHIP]_ID for HB platform restrict size of groups formed for HW423589_OPTION2 p9_sbe_fabricinit.C set ATTR_FABRIC_ADDR_EXTENSION[GROUP|CHIP]_ID for SBE platform configure FBC/NMMU extended addressing registers p9_setup_bars.C p9_setup_bars_defs.H p9_setup_bars_errors.xml add general purpose support for extended address mode for HW423589_OPTION2, configure static MCD setup p9_hcode_image_defines.H p9_hcode_image_build.C customize SGPE image with address extension configuration to apply p9.cxa.scom.initfile p9.int.scom.initfile p9.l2.scom.initfile p9.l3.scom.initfile p9.ncu.scom.initfile p9.nx.scom.initfile p9.trace.scan.initfile p9.vas.scom.initfile p9_hcd_cache_scominit.C p9_hcd_cache_scominit.c p9_pcie_config.C set unit address extension configuration on supported chips p9_rng_init_phase2.C p9_sbe_scominit.C p9c_set_inband_addr.C p9_sbe_load_bootloader.C p9_sbe_mcs_setup.C adapt to alterations in p9_fbc_utils_get_chip_base_address Change-Id: I614d566c073f1169f04f647057e6e85889f1c237 CQ: HW423589 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48576 Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48892 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Support for PPE commit 49883 to error out on non-TOR ring section.Claus Michael Olsen2017-12-011-0/+3
| | | | | | | | | | | | | | Change-Id: I7912c20e865aafe28c894bad98e4fbc3156d59ce Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50107 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50116
* Secure Boot: Temporarily whitelist various registers to resolve blacklist issuesNick Bofferding2017-12-011-0/+34
| | | | | | | | | | | | | Change-Id: Ia467db2a17581b55945cdad2d74a3aaff7ffa210 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50201 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Reviewed-by: SANTOSH BALASUBRAMANIAN <sbalasub@in.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50215
* Modify INT FIR configuration settingsDavid Kauer2017-12-011-0/+24
| | | | | | | | | | | | | | | | | Change-Id: Id4c1686cb111a14bef856fc91053228ff2e490d4 CQ:HW426891 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49578 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Kevin F. Reick <reick@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49866 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Revert ATTR_CEN_ECID back to ATTR_ECIDDan Crowell2017-12-011-4/+2
| | | | | | | | | | | | | | | | | | Firmware needs a common attribute for all chip targets Change-Id: Ia448b73bed691f493c7edb98e675e6febce74d23 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49941 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com> Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49944 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* fapi2: Fix template call sites for GCC 7Joel Stanley2017-12-011-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The following errors stop hostboot from building with modern GCC: src/import/hwpf/fapi2/include/buffer.H:710:23: error: invalid operands of types ‘<unresolved overloaded function type>’ and ‘fapi2::bufferTraits<long unsigned int, unsigned int>::bits_type {aka unsigned int}’ to binary ‘operator<’ out.insert<TS, L, SS>(iv_data); ~~~~~~~~~~^~~ src/import/hwpf/fapi2/include/buffer.H: In member function ‘fapi2::buffer<T, TT>& fapi2::buffer<T, TT>::flipBit()’: src/import/hwpf/fapi2/include/buffer.H:316:49: error: expected primary-expression before ‘)’ token iv_data ^= buffer<T>().setBit<B, C>(); ^ In both cases the call site needs to be prepended with the keyword 'template'. Otherwise the name is assumed to be a non-template (as per C++ 14.2/4). Change-Id: I925c35d51787c4f4f232372f0e1299ec2a5cab42 Signed-off-by: Joel Stanley <joel.stanley@au1.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49760 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49890 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* STOP: EX deconfigure masking for EQ chiplet FIRYue Du2017-12-011-1/+19
| | | | | | | | | | | | | | | | | | Key_Cronus_Test=PM_REGRESS Change-Id: Ib5ec8e5b201631f264e4dba42f4bd387164664fa CQ: SW408926 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50147 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50151 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Added chiplet range for 0x107D0 scom address in BL/WL csvnagurram-in2017-11-281-1/+1
| | | | | | | | | | | | | | | | | Dump need to write data to 0x107D0 scom address for controlling the start/stop/rest trace for all perv chiplets. Hence added chiplet range for aforementioned scom address in BL/WL csv. Change-Id: I932d5275d76d2491dc0972bbfc2f25e52c59b1c3 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50042 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: SANTOSH BALASUBRAMANIAN <sbalasub@in.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50044 Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
* remove NV iovalid assertion from FW and add scan inits to resolve glsmux xstateJoe McGill2017-11-284-41/+111
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | p9_sbe_chiplet_reset remove deassertion of OBUS clk async reset, shift to p9_sbe_startclock_chiplets p9_sbe_startclock_chiplets conditionally remove workaround (assert iovalid, clock, deassert iovalid) instituted to flush DL glmux select pipeline, these will be set via scan for supported chips deassert OBUS clk async reset p9_chiplet_scominit remove assertion of NV iovalid from HB p9.npu.scan.initfile alter flush state of NVDL glsmux select pipe latches to 0b10 p9.obus.scan.initfile alter flush state of IOO PHY logic to enable lane clocks clear RX_LANE_ANA_PDWN clear RX_CLKDIST_PDWN set RX_IREF_PDWN_B Change-Id: Ib9d4bf18a181ed1cf55eaf92e1486c494757d657 CQ: HW404391 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50027 Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50029 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* p9_xip_tool support for DD level section parsingRichard J. Knight2017-11-233-158/+389
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Currently supports only .overlays section. - Fixed an heap problem causing segmentation fault after repetitive use of malloc in rs4_decompress() and rs4_extract_cmsk(). Now allocating buffers locally and calling _rs4_decompress() and _rs4_extract_cmsk() instead so only have to use malloc once. - Fixed a bug in the usage of the ringBlockPtr which got moved away from pointing to its initially allocated buffer after the first CMSK ring is processed. - Even though malloc() can be used in a C++ context, we really should be using the new() operator. So, I replaced all malloc() and free() with new() and delete() instead in both p9_xip_tool.C and p9_scan_compression.C. Change-Id: I2da7509ed7aaa13345185dc07bce57f71c3740fd Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42531 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Richard J. Knight <rjknight@us.ibm.com> Reviewed-by: Sumit Kumar <sumit_kumar@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42802 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* PPE empty PK FFDC handler to save-off required registersRaja Das2017-11-202-2/+20
| | | | | | | | | | | | | | | | | - Defined PPE_CAPTURE_INTERRUPT_FFDC, by default NULL - Dependent Platform need to plug in a branch for FFDC Change-Id: Iea222662abe19c0b5f9da6eac3e161963b1c047c RTC:179374 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48977 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48979 Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
* Change FAPI_IMP traces in p9_pm_ocb_init to FAPI_DBGspashabk-in2017-11-201-15/+15
| | | | | | | | | | | | | | | | Reducing the tracing level of p9_pm_ocb_init from FAPI_IMP to FAPI_DBG Change-Id: I659180ce4563a1108cf15bbb9bc2ceccc1f7d274 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48156 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48158
* update data token init to use scans on p9c 1.1Daniel Howe2017-11-181-3/+3
| | | | | | | | | | | | | | | Change-Id: I55d2926b1cd2de7fcda4a475837e1ff54b2cc229 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49537 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49546 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Update: xip_tool: Introducing image section type (IST).Claus Michael Olsen2017-11-174-229/+415
| | | | | | | | | | | | | | | | | | | | | Currently xip_tool bails out if attempting to run a "report" on a standalone overrides or overlays ring section. So, added support for: - "report" for standalone TOR ring section and standalone DD container. - Introduced the Image Section Type (IST) to enumerate the various image types supported in an XIP image. Change-Id: I465248e802d496c4ff571ad92ea42cda9656db68 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48720 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Sumit Kumar <sumit_kumar@in.ibm.com> Reviewed-by: Richard J. Knight <rjknight@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48721 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Allow lpc_ed for p9n 2.2 per HW418117 fixDaniel Howe2017-11-171-4/+6
| | | | | | | | | | | | | | | Change-Id: I23eeb099239e61073659a1e4633e388f8db0a319 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49535 Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Reviewed-by: LUKE MURRAY <murrayl@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49549 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* p9.filter.pll.scan.intifile -- set 0 BGoffset for P9C DD1.1Joe McGill2017-11-161-7/+0
| | | | | | | | | | | | | | | | Change-Id: Ib7f554f6249db510e6c13cb871ab110a5ea4570b Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49559 Reviewed-by: Ann C. Wu <annchen@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49569 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* HW425038 INT ARX timeout workaround - Updated initfiles to 49241Claus Michael Olsen2017-11-161-3/+33
| | | | | | | | | | | | | | | | Change-Id: I42a3601917ab4d4b32b32e03d33ffa1f8c0da25f Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49608 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Dev-Ready: Kahn C. Evans <kahnevan@us.ibm.com> Reviewed-by: Richard J. Knight <rjknight@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49621 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Fix bug in cache query state procedurePrasad Bg Ranganath2017-11-161-11/+30
| | | | | | | | | | | | | | | | Change-Id: Ic4869b2d73e90bd213c229fc83b189cb10ad57b6 CQ:SW407497 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49476 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Brian T. Vanderpool <vanderp@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49584 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Added CI throttling support, HW init updates, and fixed a bug with tce arb.Ricardo Mata2017-11-161-0/+25
| | | | | | | | | | | | | | | | | Change-Id: Id71511d75e526e567fd8ba6b56551adfe2806fa4 CQ: SW407851 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49390 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49393 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* mvpd_access_defs.H -- add enum for AW keyword accessJoe McGill2017-11-161-0/+1
| | | | | | | | | | | | | | | | Change-Id: I58fd7287bf9d16855ede133e7d3b088ee6985fde Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49567 Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49572 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* cleanup: xip_tool: Fixing two command arguments.Claus Michael Olsen2017-11-141-51/+52
| | | | | | | | | | | | | | | | | 1) Getting rid of 'disasm' command. 2) Removing need for 1st sub-argument to 'dissect' command when supplying a stand-alone image like an overrides ring section file. Change-Id: Ibe35277dc525e6b6ccf768bf34c0fec8711f8b2a Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49021 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49023 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Small change to dd container header file.Claus Michael Olsen2017-11-131-0/+2
| | | | | | | | | | | | | Change-Id: I1f09d709810aaab9ff7540e65d9425ce81fcb038 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49401 Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49407 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* PM: Fix QCSR and CCSR updatePrasad Bg Ranganath2017-11-132-6/+18
| | | | | | | | | | | | | | | | | | - Use base addresses vs set addresses to ensure that all fields are correct cmvc-prereq:1037315 CQ:SW405722 Change-Id: I330c309131ac4ac44c6dc294627e1ff02d33004a Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48552 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Juan R. Medina <jrmedina@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48557 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* HW425038 INT ARX timeout workaroundDavid Kauer2017-11-131-0/+24
| | | | | | | | | | | | | | | | | Change-Id: I85813e422b4bdc9f01d1f891bece26b7fd6fdbf5 CQ: HW425038 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49241 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49258 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* HW403465 applies to all chips; Revert NDD2.1 RL; add SW406970Nick Klazynski2017-11-131-23/+28
| | | | | | | | | | | | | | | | | | | | Per Ron Kalla's request, NDD2.1 should not use risklevel Change-Id: I2354c2523d760ac16f7c4c2429003ef07e58225d CQ: HW403465 CQ: SW406970 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49148 Dev-Ready: James N. Klazynski <jklazyns@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: James N. Klazynski <jklazyns@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49152 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* IO, FBC updates to enable ABUS for FleetwoodJoe McGill2017-11-133-2/+105
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Attributes: ------------------------------------------------------------------------------- nest_attributes.xml add ATTR_LINK_TRAIN, written by platform on X, O endpoints to specify whether half or full link should be trained add ATTR_PROC_FABRIC_LINK_ACTIVE, written by p9_fbc_eff_config_links adjust enums for ATTR_PROC_FABRIC_[XA]_ATTACHED_CHIP_CNFG, written by p9_fbc_eff_config_links add ATTR_PROC_FABRIC_[XA]_LINKS_CNFG, written by p9_fbc_eff_config_links pervasive_attributes.xml create ATTR_PROC_NPU_REGION_ENABLED to encapsulate accessibility of NPU logic domain, written by p9_chiplet_scominit chip_ec_attributes.xml add EC feature attribute controlling DL training workaround Initfiles: ------------------------------------------------------------------------------- p9.fbc.ab_hp.scom.initfile add logic to permit reset of chg_rate master dials in second phase SMP build adjust link enable expressions to reflect new ATTACHED_CHIP_CNFG enums p9.fbc.cd_hp.scom.initfile p9.fbc.no_hp.scom.initfile consume number of configured X/A links from new attribute, simple addition won't work any longer given new ATTACHED_CHIP_CNFG enums p9.fbc.ioe_dl.scom.initfile support half-link operation, based on ATTR_LINK_TRAIN on X endpoint target p9.fbc.ioe_tl.scom.initifle adjust link enable expressions to reflect new ATTACHED_CHIP_CNFG enums p9.fbc.ioo_dl.scom.initfile support half-link operation, based on ATTR_LINK_TRAIN on O endpoint target qualify OLL enablement based on use as active fabric link adjust PHY training parameters based on current lab learning p9.fbc.ioo_tl.scom.initfile adjust link enable expressions to reflect new ATTACHED_CHIP_CNFG enums support half-link operation, based on ATTACHED_CHIP_CNFG qualify TOD_ENABLE to apply only to O links carrying X traffic p9.npu.scom.initfile clear OPTICAL_IO_CONFIG when not actively using NVLINK, finer-grained updates needed to support mix of O SMP and NVLINK usage HWPs: ------------------------------------------------------------------------------- p9_io_obus_dccal execute only on links actively carrying fabric protocol p9_io_obus_linktrain p9_io_regs encapsulate PHY FIFO reset sequence needed prior to FBC DL training execution p9_chiplet_scominit p9_npu_scominit partial good updates for NPU region p9_fab_iovalid adjust iovalid manipulation/checking, as well as link delay reporting, to support half-link configuration p9_smp_link_layer support half-link configuration via ATTR_PROC_FABRIC_[XA]_ATTACHED_CHIP_CNFG implement OBUS PHY specific workarounds p9_eff_config_links update ATTR_PROC_FABRIC_[XA]_ATTACHED_CHIP_CNFG to support half-link configuration write ATTR_PROC_FABRIC_LINK_ACTIVE on X/O endpoint targets write ATTR_PROC_FABRIC_[XA]_LINKS_CNFG to reflect total number of logically configured links, for initfile consumption Istep wrappers: ------------------------------------------------------------------------------- p9_build_smp_wrap correctly loop over all system targets for second phase SMP build p9_sys_chiplet_scominit_wrap initial release Change-Id: Ic1d87df4d3ff0feca7ac2437fa61b6d2fc4a2d68 CQ: HW419022 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43905 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: DANIEL C. HOWE <dchowe@us.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/46996 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Overlays and multi-DD XIP related updates to xip_image and dd_containerClaus Michael Olsen2017-11-071-11/+12
| | | | | | | | | | | | | | | | | | | | | to support WIN32 for manu team. Also, - various updates to dd_container error handling, - improved DD support query checking. Change-Id: Ic01923def3c370f7991917a3f7d2ae3b36dd87dc Original-Change-Id: I706e56258894c3453cf01aa1a637fe888af1db00 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/46596 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Richard J. Knight <rjknight@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49298 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* p9_dd_container: simple generic standalone DD level containerMartin Peschke2017-11-071-0/+94
| | | | | | | | | | | | Change-Id: I4c9d8cb28d4ae6a8b21c87ebaad07c1fd7163b85 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39588 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Claus M. Olsen <cmolsen@us.ibm.com> Reviewed-by: Sumit Kumar <sumit_kumar@in.ibm.com> Reviewed-by: Martin Peschke <mpeschke@de.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49297 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Fixing NCU and Core generated initfiles core to support CDD1.1Nick Klazynski2017-11-031-5/+5
| | | | | | | | | | | | | | Change-Id: I3212489668cf33978854b4767dc307c7f7f0fe99 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49103 Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com> Reviewed-by: Benjamin Gass <bgass@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49107 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Adding p9c_11 support.Ben Gass2017-11-034-10/+24
| | | | | | | | | | | | | | | Change-Id: If9ffe53acd009c1520cdd7f162e88fd235799225 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/46361 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Reviewed-by: Soma Bhanutej <soma.bhanu@in.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48896 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Add HW425526 and HW425027Nick Klazynski2017-11-021-43/+20
| | | | | | | | | | | | | | | | | | | | | dis_tracker_merge does not matter since dis_tracker is now enabled everywhere, so I removed it. Change-Id: I9eb2871eec16f167c9f7514dcb84e057e0196f90 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49003 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Dev-Ready: James N. Klazynski <jklazyns@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49015 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Centaur ring support - TOR APIClaus Michael Olsen2017-11-028-374/+415
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Key_Cronus_Test=XIP_REGRESS - Updates to TOR API codes to allow user codes to call TOR API function on a Centaur image. Note that the API no longer needs the caller to supply and XIP section ID. - Updates to TOR API codes to take advantage of the improved data and meta-data representation in the ring Id codes and the more self-contained ring image which now has the TOR magic header. - Updates to xip_tool to allow dissection of Centaur image. - Additional updates to TOR API codes and ring Id codes to continue improving overall clarity of data, data structures and flow through TOR API, incl name changes to related data variables and structures. Change-Id: I42891b9662cc0c443d2b16ce866ac945dc2c58dc Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38018 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38562 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Centaur ring support - ring_apply and ring dataSumit Kumar2017-11-0216-775/+1235
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Introduces Centaur ring ID header files and ring_apply support to generate a separate Centaur ring image file. - Introduces common ring ID header file consumed by both P9 and Centaur and all user codes, e.g. putRing, ipl_build, xip_tool, etc. - Introduces a namespace approach for complete separation of P9 and Centaur ring data and to facilitate execution time selection of either P9 and Centaur ring data. - Added Centaur image .rings generation function to p9_ring_apply. - This commit does NOT support Centaur in the TOR API nor in xip_tool. See commit 38018 for that support. - Modified hw_image.mk file to support Centaur XIP image generation. - Updated ring_apply to also support .overrides ring gen for Centaur. Change-Id: I12a27b194dc14d906fea7bc273eb9f766f0fc5bf Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35639 Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sumit Kumar <sumit_kumar@in.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Richard J. Knight <rjknight@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36010 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Fix to skip Osc check in sim onlySoma BhanuTej2017-11-021-57/+76
| | | | | | | | | | | | | | Change-Id: Ie7d72d588764e87050b1eded25cc8247b3e99210 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48877 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Abhishek Agarwal <abagarw8@in.ibm.com> Reviewed-by: Anusha Reddy Rangareddygari <anusrang@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48880 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* PM: Disable core hang busterGreg Still2017-11-021-1/+1
| | | | | | | | | | | | | | | | | | | | - Make default attribute control be DISABLED Change-Id: I77bab151700247f7ea1ab6e77529db2bb5681fcb CQ: SW406324 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48925 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Brian T. Vanderpool <vanderp@us.ibm.com> Dev-Ready: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48929 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Make plat init attributes non-writableSantosh Puranik2017-10-274-311/+8
| | | | | | | | | | | | | | | | | Change-Id: I382948a4083293e4ecc42a9759559a060444f5f0 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/34997 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Reviewed-by: SRINIVAS V. POLISETTY <srinivan@in.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35043 Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
* p9_sbe_check_quiesce -- dont attempt PHB DMA quiesce if ETU is already in resetJoe McGill2017-10-271-16/+20
| | | | | | | | | | | | | | | Change-Id: I32c2e2f1d2f4793a8ae42561a74d9ff3abdfa897 CQ: SW403955 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48805 Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Ricardo Mata <ricmata@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48811 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Turning on NCU tlbie pacing by defaultLuke C. Murray2017-10-272-0/+51
| | | | | | | | | | | | | | | | Change-Id: I954651af59c18401a9bd5f389f86b8faf799edbd Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48817 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48821 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Cleanup security listspashabk-in2017-10-261-16/+0
| | | | | | | | | | | | | | | | Remove all the TODO registers from security list Change-Id: Ic0d5020a8dd83a5a0971eb0f6048200d408ddd61 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48799 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Reviewed-by: SANTOSH BALASUBRAMANIAN <sbalasub@in.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48803 Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
* osclite status check in clock_test2Anusha Reddy Rangareddygari2017-10-261-10/+28
| | | | | | | | | | | | | | | | | checking bits based on pci osc scenarios Change-Id: Ida0b6d97cffc1bc43d32dda1f3bdb611e26d56bf Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48485 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Joachim Fenkes <fenkes@de.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: PARVATHI RACHAKONDA <prachako@in.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48491 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Need to clear OCB3 errors before a PBA operationThi Tran2017-10-261-2/+5
| | | | | | | | | | | | | | | Change-Id: Iaa7246b82bc490222162ef74011db78bc8631e23 CQ:SW405593 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48647 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Benjamin Gass <bgass@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48649 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Axone UpdateAnusha Reddy Rangareddygari2017-10-243-28/+119
| | | | | | | | | | | | | | | | | * IOF0 pll initf for Axone * Clock mux settings Change-Id: I1c6350bca42fc11e8e2a93f4134ea5db76daf79e Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48278 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: SRINIVAS V. POLISETTY <srinivan@in.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Reviewed-by: Soma Bhanutej <soma.bhanu@in.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: PARVATHI RACHAKONDA <prachako@in.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48282 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Update hardware procedure metadataAnusha Reddy Rangareddygari2017-10-241-1/+1
| | | | | | | | | | | | | | | | | | | update the metadata to reflect that HWPs are product ready (HWP Level: 3) Change-Id: I7199693614997bef5d5b5c9373e20c6c44a05a1a Original-Change-Id: I5a7380e9f34865b3e0ef7872d6338a840b08aa4a Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/46789 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: SRINIVAS V. POLISETTY <srinivan@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48503 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
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