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* Add build_tag to xip image headerPrachi Gupta2017-02-023-16/+12
* p9_pba_coherent_utils -- add PIB abort error handling for Cronus platformCHRISTINA L. GRAVES2017-02-023-11/+271
* FIR updates -- pervasive/core/PPEJoe McGill2017-02-024-52/+178
* Adding HW363780 to NPU scom initfilesJenny Huynh2017-02-021-0/+18
* Disable special wakeup at the end of p9_pm_initCorey Swenson2017-02-012-2/+35
* Adding in LPC and OPB timeout valuesCHRISTINA L. GRAVES2017-02-011-2/+16
* IOPPE image build flowMartin Peschke2017-02-011-4/+10
* I/O PPE Nvlink, Xbus, AbusChris Steffen2017-01-311-2/+2
* workarounds for HW399919 HW400898 HW398269 HW398269 HW399765Nick Klazynski2017-01-311-0/+137
* Control NDL training updateAnusha Reddy Rangareddygari2017-01-314-25/+122
* Istep4: clean up istep4 todo items and mark them with RTCYue Du2017-01-3116-70/+54
* Removed c++11 dependencySachin Gupta2017-01-312-10/+2
* Added periodic cal fix - fixes bad delaysStephen Glancy2017-01-311-0/+18
* workaround for hw400932 atag corruptin in prespShelton Leung2017-01-311-0/+17
* Small fix to TOR API to NOT display dbg msg when passed a ringIdClaus Michael Olsen2017-01-311-1/+4
* Add ATTR_MINI_EC for Firmware useDan Crowell2017-01-311-1/+18
* TOR space reductionsMartin Peschke2017-01-259-908/+936
* dd1 workaround for hw400075 coherency errorShelton Leung2017-01-251-0/+17
* p9.core.scan.initfile -- mask local error from CC in EC perv LFIRJoe McGill2017-01-241-0/+17
* VITAL cleaning for DD2Anusha Reddy Rangareddygari2017-01-243-92/+29
* p9_sbe_tp_chiplet_init3 -- disable TP TOD hang pulseJoe McGill2017-01-243-3/+34
* p9_sbe_attr_setup optimizedAnusha Reddy Rangareddygari2017-01-241-35/+13
* p9_sbe_tp_chiplet_init1 optimizedAnusha Reddy Rangareddygari2017-01-241-26/+22
* p9_pm_pstate_gpe_init Level 2Greg Still2017-01-241-0/+32
* FBC updates for HW383616, HW384245Joe McGill2017-01-242-2/+36
* Updating P9 L2 scan initfile to use attributesLuke Murray2017-01-241-0/+34
* Add constant for VPD #W keywordDan Crowell2017-01-241-0/+1
* Added Quad Power Management Mode Register Clear for Quad Power HwpRaja Das2017-01-231-1/+10
* Adding chip_ec_feature attributes for dd2 buildBen Gass2017-01-221-0/+1312
* Adding skip group dials for cache when chip=groupLuke Murray2017-01-222-0/+54
* Changing ttype to dma for MPIPL runsCHRISTINA L. GRAVES2017-01-221-2/+13
* Set plck as default mode in ATTR_BOOT_FLAGSSantosh Puranik2017-01-221-1/+1
* istep 4: only use one EX even if both are goodGreg Still2017-01-192-20/+47
* PK: make GPE using 8B in64/out64 opYue Du2017-01-181-31/+0
* MCS FIR updatesJoe McGill2017-01-182-5/+1
* p9_sbe_startclock_chiplets optimizedAnusha Reddy Rangareddygari2017-01-181-146/+45
* p9_sbe_chiplet_pll_setup optimizedAnusha Reddy Rangareddygari2017-01-181-162/+111
* SGPE HWP : tune PFET controller pollingAmit Kumar2017-01-171-2/+7
* p9_sbe_chiplet_reset -- drive PCIE PLL from SS filter PLL for DD1.xJoe McGill2017-01-172-6/+32
* PK stack checkingDoug Gilbert2017-01-175-9/+50
* add SS PLL settings to support 94 MHz PCI operationJoe McGill2017-01-161-0/+18
* Modify signature of p9_stopclocksspashabk-in2017-01-162-70/+99
* p9_stopclocks SBE/PPE related changesspashabk-in2017-01-164-31/+205
* Implementation of PIB stopclock with CBSSoma BhanuTej2017-01-164-51/+231
* Adding bool for cache/cores in the p9_stopclocks HWPSoma BhanuTej2017-01-162-9/+25
* Changing ATTR_PG from 32 to 16 bitAnusha Reddy Rangareddygari2017-01-161-3/+3
* Stopclock procedure updatesSoma BhanuTej2017-01-164-56/+110
* Fixing a bug in stopclk cmn module - p9_common_stopclocksSoma BhanuTej2017-01-162-3/+3
* Fapi Implementation of Level2 HWP p9_stopclocksSoma BhanuTej2017-01-1610-19/+1060
* Level 1 HWP for p9_stopclocksSoma BhanuTej2017-01-162-0/+150
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