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* Added chiplet range for 0x107D0 scom address in BL/WL csvnagurram-in2017-11-281-1/+1
| | | | | | | | | | | | | | | | | Dump need to write data to 0x107D0 scom address for controlling the start/stop/rest trace for all perv chiplets. Hence added chiplet range for aforementioned scom address in BL/WL csv. Change-Id: I932d5275d76d2491dc0972bbfc2f25e52c59b1c3 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50042 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: SANTOSH BALASUBRAMANIAN <sbalasub@in.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50044 Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
* remove NV iovalid assertion from FW and add scan inits to resolve glsmux xstateJoe McGill2017-11-284-41/+111
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | p9_sbe_chiplet_reset remove deassertion of OBUS clk async reset, shift to p9_sbe_startclock_chiplets p9_sbe_startclock_chiplets conditionally remove workaround (assert iovalid, clock, deassert iovalid) instituted to flush DL glmux select pipeline, these will be set via scan for supported chips deassert OBUS clk async reset p9_chiplet_scominit remove assertion of NV iovalid from HB p9.npu.scan.initfile alter flush state of NVDL glsmux select pipe latches to 0b10 p9.obus.scan.initfile alter flush state of IOO PHY logic to enable lane clocks clear RX_LANE_ANA_PDWN clear RX_CLKDIST_PDWN set RX_IREF_PDWN_B Change-Id: Ib9d4bf18a181ed1cf55eaf92e1486c494757d657 CQ: HW404391 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50027 Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50029 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* p9_xip_tool support for DD level section parsingRichard J. Knight2017-11-233-158/+389
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Currently supports only .overlays section. - Fixed an heap problem causing segmentation fault after repetitive use of malloc in rs4_decompress() and rs4_extract_cmsk(). Now allocating buffers locally and calling _rs4_decompress() and _rs4_extract_cmsk() instead so only have to use malloc once. - Fixed a bug in the usage of the ringBlockPtr which got moved away from pointing to its initially allocated buffer after the first CMSK ring is processed. - Even though malloc() can be used in a C++ context, we really should be using the new() operator. So, I replaced all malloc() and free() with new() and delete() instead in both p9_xip_tool.C and p9_scan_compression.C. Change-Id: I2da7509ed7aaa13345185dc07bce57f71c3740fd Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42531 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Richard J. Knight <rjknight@us.ibm.com> Reviewed-by: Sumit Kumar <sumit_kumar@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42802 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* PPE empty PK FFDC handler to save-off required registersRaja Das2017-11-202-2/+20
| | | | | | | | | | | | | | | | | - Defined PPE_CAPTURE_INTERRUPT_FFDC, by default NULL - Dependent Platform need to plug in a branch for FFDC Change-Id: Iea222662abe19c0b5f9da6eac3e161963b1c047c RTC:179374 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48977 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48979 Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
* Change FAPI_IMP traces in p9_pm_ocb_init to FAPI_DBGspashabk-in2017-11-201-15/+15
| | | | | | | | | | | | | | | | Reducing the tracing level of p9_pm_ocb_init from FAPI_IMP to FAPI_DBG Change-Id: I659180ce4563a1108cf15bbb9bc2ceccc1f7d274 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48156 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48158
* update data token init to use scans on p9c 1.1Daniel Howe2017-11-181-3/+3
| | | | | | | | | | | | | | | Change-Id: I55d2926b1cd2de7fcda4a475837e1ff54b2cc229 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49537 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49546 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Update: xip_tool: Introducing image section type (IST).Claus Michael Olsen2017-11-174-229/+415
| | | | | | | | | | | | | | | | | | | | | Currently xip_tool bails out if attempting to run a "report" on a standalone overrides or overlays ring section. So, added support for: - "report" for standalone TOR ring section and standalone DD container. - Introduced the Image Section Type (IST) to enumerate the various image types supported in an XIP image. Change-Id: I465248e802d496c4ff571ad92ea42cda9656db68 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48720 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Sumit Kumar <sumit_kumar@in.ibm.com> Reviewed-by: Richard J. Knight <rjknight@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48721 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Allow lpc_ed for p9n 2.2 per HW418117 fixDaniel Howe2017-11-171-4/+6
| | | | | | | | | | | | | | | Change-Id: I23eeb099239e61073659a1e4633e388f8db0a319 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49535 Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Reviewed-by: LUKE MURRAY <murrayl@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49549 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* p9.filter.pll.scan.intifile -- set 0 BGoffset for P9C DD1.1Joe McGill2017-11-161-7/+0
| | | | | | | | | | | | | | | | Change-Id: Ib7f554f6249db510e6c13cb871ab110a5ea4570b Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49559 Reviewed-by: Ann C. Wu <annchen@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49569 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* HW425038 INT ARX timeout workaround - Updated initfiles to 49241Claus Michael Olsen2017-11-161-3/+33
| | | | | | | | | | | | | | | | Change-Id: I42a3601917ab4d4b32b32e03d33ffa1f8c0da25f Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49608 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Dev-Ready: Kahn C. Evans <kahnevan@us.ibm.com> Reviewed-by: Richard J. Knight <rjknight@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49621 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Fix bug in cache query state procedurePrasad Bg Ranganath2017-11-161-11/+30
| | | | | | | | | | | | | | | | Change-Id: Ic4869b2d73e90bd213c229fc83b189cb10ad57b6 CQ:SW407497 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49476 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Brian T. Vanderpool <vanderp@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49584 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Added CI throttling support, HW init updates, and fixed a bug with tce arb.Ricardo Mata2017-11-161-0/+25
| | | | | | | | | | | | | | | | | Change-Id: Id71511d75e526e567fd8ba6b56551adfe2806fa4 CQ: SW407851 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49390 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49393 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* mvpd_access_defs.H -- add enum for AW keyword accessJoe McGill2017-11-161-0/+1
| | | | | | | | | | | | | | | | Change-Id: I58fd7287bf9d16855ede133e7d3b088ee6985fde Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49567 Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49572 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* cleanup: xip_tool: Fixing two command arguments.Claus Michael Olsen2017-11-141-51/+52
| | | | | | | | | | | | | | | | | 1) Getting rid of 'disasm' command. 2) Removing need for 1st sub-argument to 'dissect' command when supplying a stand-alone image like an overrides ring section file. Change-Id: Ibe35277dc525e6b6ccf768bf34c0fec8711f8b2a Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49021 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49023 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Small change to dd container header file.Claus Michael Olsen2017-11-131-0/+2
| | | | | | | | | | | | | Change-Id: I1f09d709810aaab9ff7540e65d9425ce81fcb038 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49401 Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49407 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* PM: Fix QCSR and CCSR updatePrasad Bg Ranganath2017-11-132-6/+18
| | | | | | | | | | | | | | | | | | - Use base addresses vs set addresses to ensure that all fields are correct cmvc-prereq:1037315 CQ:SW405722 Change-Id: I330c309131ac4ac44c6dc294627e1ff02d33004a Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48552 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Juan R. Medina <jrmedina@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48557 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* HW425038 INT ARX timeout workaroundDavid Kauer2017-11-131-0/+24
| | | | | | | | | | | | | | | | | Change-Id: I85813e422b4bdc9f01d1f891bece26b7fd6fdbf5 CQ: HW425038 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49241 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49258 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* HW403465 applies to all chips; Revert NDD2.1 RL; add SW406970Nick Klazynski2017-11-131-23/+28
| | | | | | | | | | | | | | | | | | | | Per Ron Kalla's request, NDD2.1 should not use risklevel Change-Id: I2354c2523d760ac16f7c4c2429003ef07e58225d CQ: HW403465 CQ: SW406970 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49148 Dev-Ready: James N. Klazynski <jklazyns@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: James N. Klazynski <jklazyns@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49152 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* IO, FBC updates to enable ABUS for FleetwoodJoe McGill2017-11-133-2/+105
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Attributes: ------------------------------------------------------------------------------- nest_attributes.xml add ATTR_LINK_TRAIN, written by platform on X, O endpoints to specify whether half or full link should be trained add ATTR_PROC_FABRIC_LINK_ACTIVE, written by p9_fbc_eff_config_links adjust enums for ATTR_PROC_FABRIC_[XA]_ATTACHED_CHIP_CNFG, written by p9_fbc_eff_config_links add ATTR_PROC_FABRIC_[XA]_LINKS_CNFG, written by p9_fbc_eff_config_links pervasive_attributes.xml create ATTR_PROC_NPU_REGION_ENABLED to encapsulate accessibility of NPU logic domain, written by p9_chiplet_scominit chip_ec_attributes.xml add EC feature attribute controlling DL training workaround Initfiles: ------------------------------------------------------------------------------- p9.fbc.ab_hp.scom.initfile add logic to permit reset of chg_rate master dials in second phase SMP build adjust link enable expressions to reflect new ATTACHED_CHIP_CNFG enums p9.fbc.cd_hp.scom.initfile p9.fbc.no_hp.scom.initfile consume number of configured X/A links from new attribute, simple addition won't work any longer given new ATTACHED_CHIP_CNFG enums p9.fbc.ioe_dl.scom.initfile support half-link operation, based on ATTR_LINK_TRAIN on X endpoint target p9.fbc.ioe_tl.scom.initifle adjust link enable expressions to reflect new ATTACHED_CHIP_CNFG enums p9.fbc.ioo_dl.scom.initfile support half-link operation, based on ATTR_LINK_TRAIN on O endpoint target qualify OLL enablement based on use as active fabric link adjust PHY training parameters based on current lab learning p9.fbc.ioo_tl.scom.initfile adjust link enable expressions to reflect new ATTACHED_CHIP_CNFG enums support half-link operation, based on ATTACHED_CHIP_CNFG qualify TOD_ENABLE to apply only to O links carrying X traffic p9.npu.scom.initfile clear OPTICAL_IO_CONFIG when not actively using NVLINK, finer-grained updates needed to support mix of O SMP and NVLINK usage HWPs: ------------------------------------------------------------------------------- p9_io_obus_dccal execute only on links actively carrying fabric protocol p9_io_obus_linktrain p9_io_regs encapsulate PHY FIFO reset sequence needed prior to FBC DL training execution p9_chiplet_scominit p9_npu_scominit partial good updates for NPU region p9_fab_iovalid adjust iovalid manipulation/checking, as well as link delay reporting, to support half-link configuration p9_smp_link_layer support half-link configuration via ATTR_PROC_FABRIC_[XA]_ATTACHED_CHIP_CNFG implement OBUS PHY specific workarounds p9_eff_config_links update ATTR_PROC_FABRIC_[XA]_ATTACHED_CHIP_CNFG to support half-link configuration write ATTR_PROC_FABRIC_LINK_ACTIVE on X/O endpoint targets write ATTR_PROC_FABRIC_[XA]_LINKS_CNFG to reflect total number of logically configured links, for initfile consumption Istep wrappers: ------------------------------------------------------------------------------- p9_build_smp_wrap correctly loop over all system targets for second phase SMP build p9_sys_chiplet_scominit_wrap initial release Change-Id: Ic1d87df4d3ff0feca7ac2437fa61b6d2fc4a2d68 CQ: HW419022 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43905 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: DANIEL C. HOWE <dchowe@us.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/46996 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Overlays and multi-DD XIP related updates to xip_image and dd_containerClaus Michael Olsen2017-11-071-11/+12
| | | | | | | | | | | | | | | | | | | | | to support WIN32 for manu team. Also, - various updates to dd_container error handling, - improved DD support query checking. Change-Id: Ic01923def3c370f7991917a3f7d2ae3b36dd87dc Original-Change-Id: I706e56258894c3453cf01aa1a637fe888af1db00 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/46596 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Richard J. Knight <rjknight@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49298 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* p9_dd_container: simple generic standalone DD level containerMartin Peschke2017-11-071-0/+94
| | | | | | | | | | | | Change-Id: I4c9d8cb28d4ae6a8b21c87ebaad07c1fd7163b85 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39588 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Claus M. Olsen <cmolsen@us.ibm.com> Reviewed-by: Sumit Kumar <sumit_kumar@in.ibm.com> Reviewed-by: Martin Peschke <mpeschke@de.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49297 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Fixing NCU and Core generated initfiles core to support CDD1.1Nick Klazynski2017-11-031-5/+5
| | | | | | | | | | | | | | Change-Id: I3212489668cf33978854b4767dc307c7f7f0fe99 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49103 Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com> Reviewed-by: Benjamin Gass <bgass@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49107 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Adding p9c_11 support.Ben Gass2017-11-034-10/+24
| | | | | | | | | | | | | | | Change-Id: If9ffe53acd009c1520cdd7f162e88fd235799225 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/46361 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Reviewed-by: Soma Bhanutej <soma.bhanu@in.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48896 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Add HW425526 and HW425027Nick Klazynski2017-11-021-43/+20
| | | | | | | | | | | | | | | | | | | | | dis_tracker_merge does not matter since dis_tracker is now enabled everywhere, so I removed it. Change-Id: I9eb2871eec16f167c9f7514dcb84e057e0196f90 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49003 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Dev-Ready: James N. Klazynski <jklazyns@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49015 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Centaur ring support - TOR APIClaus Michael Olsen2017-11-028-374/+415
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Key_Cronus_Test=XIP_REGRESS - Updates to TOR API codes to allow user codes to call TOR API function on a Centaur image. Note that the API no longer needs the caller to supply and XIP section ID. - Updates to TOR API codes to take advantage of the improved data and meta-data representation in the ring Id codes and the more self-contained ring image which now has the TOR magic header. - Updates to xip_tool to allow dissection of Centaur image. - Additional updates to TOR API codes and ring Id codes to continue improving overall clarity of data, data structures and flow through TOR API, incl name changes to related data variables and structures. Change-Id: I42891b9662cc0c443d2b16ce866ac945dc2c58dc Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38018 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38562 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Centaur ring support - ring_apply and ring dataSumit Kumar2017-11-0216-775/+1235
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Introduces Centaur ring ID header files and ring_apply support to generate a separate Centaur ring image file. - Introduces common ring ID header file consumed by both P9 and Centaur and all user codes, e.g. putRing, ipl_build, xip_tool, etc. - Introduces a namespace approach for complete separation of P9 and Centaur ring data and to facilitate execution time selection of either P9 and Centaur ring data. - Added Centaur image .rings generation function to p9_ring_apply. - This commit does NOT support Centaur in the TOR API nor in xip_tool. See commit 38018 for that support. - Modified hw_image.mk file to support Centaur XIP image generation. - Updated ring_apply to also support .overrides ring gen for Centaur. Change-Id: I12a27b194dc14d906fea7bc273eb9f766f0fc5bf Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35639 Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sumit Kumar <sumit_kumar@in.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Richard J. Knight <rjknight@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36010 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Fix to skip Osc check in sim onlySoma BhanuTej2017-11-021-57/+76
| | | | | | | | | | | | | | Change-Id: Ie7d72d588764e87050b1eded25cc8247b3e99210 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48877 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Abhishek Agarwal <abagarw8@in.ibm.com> Reviewed-by: Anusha Reddy Rangareddygari <anusrang@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48880 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* PM: Disable core hang busterGreg Still2017-11-021-1/+1
| | | | | | | | | | | | | | | | | | | | - Make default attribute control be DISABLED Change-Id: I77bab151700247f7ea1ab6e77529db2bb5681fcb CQ: SW406324 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48925 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Brian T. Vanderpool <vanderp@us.ibm.com> Dev-Ready: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48929 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Make plat init attributes non-writableSantosh Puranik2017-10-274-311/+8
| | | | | | | | | | | | | | | | | Change-Id: I382948a4083293e4ecc42a9759559a060444f5f0 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/34997 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Reviewed-by: SRINIVAS V. POLISETTY <srinivan@in.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35043 Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
* p9_sbe_check_quiesce -- dont attempt PHB DMA quiesce if ETU is already in resetJoe McGill2017-10-271-16/+20
| | | | | | | | | | | | | | | Change-Id: I32c2e2f1d2f4793a8ae42561a74d9ff3abdfa897 CQ: SW403955 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48805 Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Ricardo Mata <ricmata@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48811 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Turning on NCU tlbie pacing by defaultLuke C. Murray2017-10-272-0/+51
| | | | | | | | | | | | | | | | Change-Id: I954651af59c18401a9bd5f389f86b8faf799edbd Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48817 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48821 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Cleanup security listspashabk-in2017-10-261-16/+0
| | | | | | | | | | | | | | | | Remove all the TODO registers from security list Change-Id: Ic0d5020a8dd83a5a0971eb0f6048200d408ddd61 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48799 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Reviewed-by: SANTOSH BALASUBRAMANIAN <sbalasub@in.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48803 Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
* osclite status check in clock_test2Anusha Reddy Rangareddygari2017-10-261-10/+28
| | | | | | | | | | | | | | | | | checking bits based on pci osc scenarios Change-Id: Ida0b6d97cffc1bc43d32dda1f3bdb611e26d56bf Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48485 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Joachim Fenkes <fenkes@de.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: PARVATHI RACHAKONDA <prachako@in.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48491 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Need to clear OCB3 errors before a PBA operationThi Tran2017-10-261-2/+5
| | | | | | | | | | | | | | | Change-Id: Iaa7246b82bc490222162ef74011db78bc8631e23 CQ:SW405593 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48647 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Benjamin Gass <bgass@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48649 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Axone UpdateAnusha Reddy Rangareddygari2017-10-243-28/+119
| | | | | | | | | | | | | | | | | * IOF0 pll initf for Axone * Clock mux settings Change-Id: I1c6350bca42fc11e8e2a93f4134ea5db76daf79e Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48278 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: SRINIVAS V. POLISETTY <srinivan@in.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Reviewed-by: Soma Bhanutej <soma.bhanu@in.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: PARVATHI RACHAKONDA <prachako@in.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48282 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Update hardware procedure metadataAnusha Reddy Rangareddygari2017-10-241-1/+1
| | | | | | | | | | | | | | | | | | | update the metadata to reflect that HWPs are product ready (HWP Level: 3) Change-Id: I7199693614997bef5d5b5c9373e20c6c44a05a1a Original-Change-Id: I5a7380e9f34865b3e0ef7872d6338a840b08aa4a Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/46789 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: SRINIVAS V. POLISETTY <srinivan@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48503 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* p9_setup_clock_term updatesAnusha Reddy Rangareddygari2017-10-241-3/+5
| | | | | | | | | | | | | | | Using pci_clk_req enum to set osc0 and osc1 configurations Change-Id: Ie4a45f121e9c5ecb2e4883332ac948d80ab6a6cf Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/44218 Reviewed-by: Manish K. Chowdhary <manichow@in.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Soma Bhanutej <soma.bhanu@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48502 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Remove registers with TODO from BL/WL csvspashabk-in2017-10-231-83/+0
| | | | | | | | | | | | | | | | Removed all the registers with TODO so that they can be updated by the respective teams as and when they encounter it Change-Id: I2a74f2712eb22d7d3e3ee9101daf7ff626b791e3 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48436 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48438 Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
* Cumulus proc updatesAnusha Reddy Rangareddygari2017-10-231-1/+4
| | | | | | | | | | | | | | | | | for osc switch settings Change-Id: I8279e5f96b79274685ff3bbee4f1eb4d941cfa43 Original-Change-Id: I9e762d2c4b552e84a3a2cc48ec0d9d75732b07cf Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41676 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Soma Bhanutej <soma.bhanu@in.ibm.com> Reviewed-by: SRINIVAS V. POLISETTY <srinivan@in.ibm.com> Reviewed-by: PARVATHI RACHAKONDA <prachako@in.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48501 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Level 2 HWP for p9_setup_clock_termAnusha Reddy Rangareddygari2017-10-231-13/+36
| | | | | | | | | | | | | | | | Also included wrap files and makefiles Change-Id: I228028a5af319ebda4343e5cf39b3f2618162470 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/23474 Tested-by: Jenkins Server Dev-Ready: Brent Wieman <bwieman@us.ibm.com> Reviewed-by: Manish K. Chowdhary <manichow@in.ibm.com> Reviewed-by: Sunil Kumar <skumar8j@in.ibm.com> Reviewed-by: Parvathi Rachakonda Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48500 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* L1 Rev istep 0.(6-8,11,13,14),1.1,2.(1-13,15,18-20,22,26,27,30,32,34) V2Abhishek Agarwal2017-10-231-0/+62
| | | | | | | | | | | | | Change-Id: Ibcd2d49f00e6c3488fcbde0d80adf0bdc00b2a97 Original-Change-Id: I3ea0eec08ce479057277524021bfce540d7b63ca Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/17755 Reviewed-by: Brian Silver <bsilver@us.ibm.com> Tested-by: Brian Silver <bsilver@us.ibm.com> Reviewed-by: SRINIVAS V. POLISETTY <srinivan@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48499 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
* Additional checks to p9_extract_sbe_rcSoma BhanuTej2017-10-231-0/+17
| | | | | | | | | | | | | | | | | | | | | | | | | - To detect NDD1 or other chip for seeprom & otp addr upd - pibmem program exception - otprom program exception - Use sbe_cs bit to identify the state of pk loader - Adding CBS_STATUS_REGISTERS,ROOT_CTRL_REGISTERS in xml - Using ifndef __HOSTBOOT_MODULE while read MBOX registers - Update all Non-Secure mode RC names Change-Id: Ic764bbda94d9beb023aa1861cb143bf05b8ff06a RTC: 174954 CQ: SW404908 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41738 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Soma Bhanutej <soma.bhanu@in.ibm.com> Reviewed-by: Joachim Fenkes <fenkes@de.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42614 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* VDM: p9_pstate_parameter_block check for VDM Large threshold < -32mVGreg Still2017-10-151-1/+19
| | | | | | | | | | | | | | | | | | | | | | | - filters out old VPD parts (Nim 2.01) to just disable VDM instead of using bad jump values - check only applies for #W with version < 3 to allow for future proofing - Added error log suppression EC attribute for < Nimbus 2.1. Change-Id: Id91fc1f816b5a3da08730feb726a246d802429db CQ: SW404757 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/47964 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Dev-Ready: Francesco A. Campisano <campisan@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Reviewed-by: Francesco A. Campisano <campisan@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48047 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* PLL updates for filter BG, BW including OBUS tank coreqsJoe McGill2017-10-142-3/+50
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | p9.filter.pll.scan.initfile adjust BG offset to -1 for P9n DD2.[12], P9c DD1.1 apply BW updates to P9n DD2.2, P9c DD1.[01] p9.obus.pll.scan.initfile apply BW updates to P9n DD2.2, P9c DD1.[01] with tests 108, 109, 110 p9_frequency_buckets: default Cumulus OBUS bucket 0 to 25.625gbs chip_ec_attributes.xml add feature attributes for BG, BW controls Change-Id: I5e06da5267db70bb1d6e6eae066611577d32ac7b CQ: HW423532 CQ: HW423535 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48267 Reviewed-by: Ann C. Wu <annchen@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48269 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Use compiler definition for size_tSachin Gupta2017-10-131-2/+2
| | | | | | | | | | | | | | | | | We get multiple definition issues if we include ppe42_string.h as stddef.h also has defined size_t Change-Id: I44ec000db4df176f36d185842dd8057b2b03e28d Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48101 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Shakeeb A. Pasha B K <shakeebbk@in.ibm.com> Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48123 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Updating L2 re-request jitter settings for CumulusLuke C. Murray2017-10-121-0/+17
| | | | | | | | | | | | | | | | | | Change-Id: I5475bdfebc117ed16e8de09443a8d263742e1d2d Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48197 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48203 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Workaround for HW421347 Scandalous PieLuke C. Murray2017-10-121-0/+25
| | | | | | | | | | | | | | | | | | | | | | This was the core hang going into re-config because of L3pref unfairness in the L2 CIU between cores. Change-Id: Ic58c2e0a92e4aef0a1076b09bbdd65e9ba17421a CQ: HW421347 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48035 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com> Reviewed-by: James N. Klazynski <jklazyns@us.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Dev-Ready: James N. Klazynski <jklazyns@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48038 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* HW415883 applies to NDD2.1, Add JellyVector WAT, add HW422495, add HW421831Nick Klazynski2017-10-122-15/+16
| | | | | | | | | | | | | | | | | | - WAT replaces original workaround for HW419818; two dials removed Change-Id: I540aead6556278a1da3774eba2d96cb685c4e3c1 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/47181 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com> Dev-Ready: James N. Klazynski <jklazyns@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/47958 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Share common code between p9_l2_flush and p9_l2err_linedeleteThi Tran2017-10-113-131/+161
| | | | | | | | | | | | | | | | | Change-Id: I547078b1e0fc7adec767402faf5e64e4b4390bc9 RTC: 178071 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/46359 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Benjamin Gass <bgass@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/46385 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* p9_sbe_chiplet_reset: Set VITL_AL flag for MC chipletsJoachim Fenkes2017-10-092-0/+6
| | | | | | | | | | | | | | | | | | | | | There is a phase sync signal between the Nest and MC chiplets that is only needed for combined synchronous LBIST of the inter-chiplet interface, but can disrupt scanning in async MC operation. So it should be masked in normal operation by setting the VITL_AL flag in NET_CTRL0. Change-Id: Ic051943bbb915081b979078d248bf681c7ca5251 CQ: HW422475 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48055 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Dev-Ready: LENNARD G. STREAT <lstreat@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48057 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
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