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* Fix to skip Osc check in sim onlySoma BhanuTej2017-11-021-57/+76
* PM: Disable core hang busterGreg Still2017-11-021-1/+1
* Make plat init attributes non-writableSantosh Puranik2017-10-274-311/+8
* p9_sbe_check_quiesce -- dont attempt PHB DMA quiesce if ETU is already in resetJoe McGill2017-10-271-16/+20
* Turning on NCU tlbie pacing by defaultLuke C. Murray2017-10-272-0/+51
* Cleanup security listspashabk-in2017-10-261-16/+0
* osclite status check in clock_test2Anusha Reddy Rangareddygari2017-10-261-10/+28
* Need to clear OCB3 errors before a PBA operationThi Tran2017-10-261-2/+5
* Axone UpdateAnusha Reddy Rangareddygari2017-10-243-28/+119
* Update hardware procedure metadataAnusha Reddy Rangareddygari2017-10-241-1/+1
* p9_setup_clock_term updatesAnusha Reddy Rangareddygari2017-10-241-3/+5
* Remove registers with TODO from BL/WL csvspashabk-in2017-10-231-83/+0
* Cumulus proc updatesAnusha Reddy Rangareddygari2017-10-231-1/+4
* Level 2 HWP for p9_setup_clock_termAnusha Reddy Rangareddygari2017-10-231-13/+36
* L1 Rev istep 0.(6-8,11,13,14),1.1,2.(1-13,15,18-20,22,26,27,30,32,34) V2Abhishek Agarwal2017-10-231-0/+62
* Additional checks to p9_extract_sbe_rcSoma BhanuTej2017-10-231-0/+17
* VDM: p9_pstate_parameter_block check for VDM Large threshold < -32mVGreg Still2017-10-151-1/+19
* PLL updates for filter BG, BW including OBUS tank coreqsJoe McGill2017-10-142-3/+50
* Use compiler definition for size_tSachin Gupta2017-10-131-2/+2
* Updating L2 re-request jitter settings for CumulusLuke C. Murray2017-10-121-0/+17
* Workaround for HW421347 Scandalous PieLuke C. Murray2017-10-121-0/+25
* HW415883 applies to NDD2.1, Add JellyVector WAT, add HW422495, add HW421831Nick Klazynski2017-10-122-15/+16
* Share common code between p9_l2_flush and p9_l2err_linedeleteThi Tran2017-10-113-131/+161
* p9_sbe_chiplet_reset: Set VITL_AL flag for MC chipletsJoachim Fenkes2017-10-092-0/+6
* p9_sbe_tp_enable_ridi -- restore old behavior for cache contained mode supportJoe McGill2017-10-061-1/+24
* HWSV Dump component put scom registersspashabk-in2017-10-061-0/+46
* HWSV whitelist registers additionspashabk-in2017-10-051-42/+62
* New PPE state dump utilityAmit Kumar2017-10-051-0/+37
* PM (Cronus): Add processor id for errors from p9_activate_stop15_coresGreg Still2017-10-051-0/+20
* PM: PPE State tool fixes.Prem Shanker Jha2017-10-051-131/+41
* Revert PLL unlock commits of 45102 and 46563Yue Du2017-10-053-21/+3
* SIBRC detailsAshish2017-10-051-142/+65
* code bug: single step was not restoring dbcrAshish2017-10-051-1/+2
* p9_ppe_commands: add -step_trap supportGreg Still2017-10-051-1/+210
* p9_ppe_commands : Enhanced single stepAshish2017-10-051-35/+178
* PPE command line controlAshish2017-10-051-0/+485
* p9_thread_control -- remove threads_running check from sreset, start code pathsJoe McGill2017-10-042-113/+0
* Update default case in set_sbe_errorRichard J. Knight2017-10-041-0/+1
* {nest,cache}_pll_setup: Properly clear PLL unlock indicationJoachim Fenkes2017-10-042-3/+9
* PM (Cronus): Add processor id for errors from p9_activate_stop15_coresGreg Still2017-10-041-0/+13
* PM: PPE State tool fixes.Prem Shanker Jha2017-10-041-15/+304
* SIBRC detailsAshish2017-10-041-8/+77
* p9_ppe_commands: add -step_trap supportGreg Still2017-10-041-6/+6
* p9_ppe_commands : Enhanced single stepAshish2017-10-041-10/+25
* PPE command line controlAshish2017-10-041-0/+150
* Remove HB incorrect setting of ATTR_DD1_SLOW_PCI_REF_CLOCKThi Tran2017-10-041-1/+1
* Update hardware procedure metadataAnusha Reddy Rangareddygari2017-10-0470-103/+103
* TOR Magic header supportClaus Michael Olsen2017-10-044-302/+425
* Add workarounds for HW421426 and HW422629, Swap IMCs aroundNick Klazynski2017-10-041-0/+41
* Remove functionality from tp enable ridi and move it to nest enabled ridiChristian Geddes2017-10-023-26/+47
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