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path: root/src/import/chips/p9/sw_simulation
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* PM: Fix QCSR and CCSR updatePrasad Bg Ranganath2017-11-131-0/+9
* p9_pm_pstate_gpe_init Level 2Greg Still2017-01-241-0/+32
* Istep4: Enable poll for DPLL lock in p9_hcd_cache_dpll_setupYue Du2016-11-211-0/+10
* p9_activate_stop15_cores Level 2Greg Still2016-10-251-1/+1
* Level 2 p9_cpu_special_wakeupGreg Still2016-09-162-1/+2705
* Update OCC,PBA,CME FIR handling based on the recent RAS specificationSangeetha T S2016-09-111-0/+12
* SBE move import`Shakeeb2016-09-013-0/+3991
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