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* PM: Prevent Core-L2 Quiesce from removing PM_EXIT upon SPWUYue Du2018-08-011-1/+11
* Disable HW439321 workaround in dd1.3Adam Hale2018-07-311-0/+17
* Enable CDD1.3's 4 risklevels (step 1)Nick Klazynski2018-07-271-6/+64
* p9_sbe_lpc_init: Improve resetJoachim Fenkes2018-07-272-13/+17
* Remove ATTR_PROC_CHIP_MEM_TO_USEDan Crowell2018-07-271-12/+0
* Initf procedure updates for CumulusAnusha Reddy Rangareddygari2018-07-272-4/+121
* Handling special wakeup assert/deassert mis-match in PM Reset/Init on MALFAmit Tendolkar2018-07-222-4/+16
* p9.pci.scan.initfile -- replace 62028 implementation with initfile entryJoe McGill2018-07-192-111/+0
* STOP: remove chiplet enable drop in core_poweron for multicast scomYue Du2018-07-181-4/+1
* p9_sbe_scominit -- set XSCOM BAR in secure memory with SMF enabledJoe McGill2018-07-183-0/+30
* Avoid spurious Malf Alert (HMI) to PHYP in PM Complex Reset/SuspendAmit Tendolkar2018-07-131-0/+7
* Clockgate disable workaround for HW452921Nick Klazynski2018-07-131-3/+3
* Secure memory allocation and setupJenny Huynh2018-07-129-16/+249
* Inverted logic of hasClock bit in Clock Status registerRaja Das2018-07-121-0/+4
* p9_sbe_check_quiesce -- restore call to p9_int_scrub_cachesJoe McGill2018-07-123-3/+53
* set PEC disable store thread based ordering chicken switchesJoe McGill2018-07-103-1/+141
* allow option to enforce mirroring of all system memoryJoe McGill2018-07-071-2/+6
* p9_sbe_tp_chiplet_init3: Set up oscillator error mask based on MF osc settingJoachim Fenkes2018-07-042-29/+32
* PM: Added support for enable disable of 24x7 IMA.Prem Shanker Jha2018-07-041-0/+18
* Alink Hot Repair FixChris Steffen2018-07-021-0/+18
* p9_sbe_lpc_init: Add final check for errorsJoachim Fenkes2018-07-023-0/+38
* Updating p9.core.scan.initfile settings for p9n 2.3Ben Gass2018-06-261-2/+16
* PM: Increase PB Purge time for MPIPL to accommodate FleetwoodGreg Still2018-06-261-2/+2
* p9_sbe_tp_chiplet_init3: Don't meddle with osclite controls on CumulusJoachim Fenkes2018-06-261-11/+11
* Add RL0/RL1 support for CDD1.2Nick Klazynski2018-06-241-8/+31
* correctly propogate bad return code from p9_adu_coherent_status_checkJoe McGill2018-06-182-9/+17
* p9_sbe_scominit -- unmask TP LFIR 37 only when MF oscswitch redundancy enabledJoe McGill2018-06-182-3/+13
* Adapt p9_sbe_check_master_stop15 for bad path on non-SBE platforms for fleetwoodAmit Tendolkar2018-06-173-29/+107
* shift OBUS FIR programming inits for secure bootJoe McGill2018-06-172-3/+8
* Update p9n_23 engd with n23_e9108_3_tp105_ec408_soa_sc_u138_01 dataBen Gass2018-06-131-1/+15
* p9_sbe_common -- mark TP LFIR bit 37 as recoverableJoe McGill2018-06-111-1/+1
* p9_sbe_scominit -- unmask TP LFIR bit 37 for CumulusJoe McGill2018-06-083-0/+37
* Update some defaults for AVSBUS attributesDan Crowell2018-06-081-20/+8
* PM:Remove deprecated attributesPrasad Bg Ranganath2018-06-061-14/+0
* mask core SPATTN bit used for core checkstop handshakeJoe McGill2018-06-051-0/+2
* support IO reconfig loop for OBUS DL link training failuresJoe McGill2018-06-041-2/+3
* p9_setup_clock_term: Apply tweak bits, put oscswitches into resetJoachim Fenkes2018-06-011-5/+7
* p9_sbe_common -- mark TP LFIR bits 18:20 recoverableJoe McGill2018-06-011-2/+2
* Adding p9c 1.3 support.Soma BhanuTej2018-05-255-34/+56
* Disable 2-for-1 on NDD2.2- and CDD1.2-Nick Klazynski2018-05-181-4/+5
* enable spreading via SS PLL for Fleetwood platformJoe McGill2018-05-173-4/+34
* Enable full ERAT for NDD2.2+ and CDD1.1+Nick Klazynski2018-05-171-0/+24
* SBE:PUTRING: Add callout support for checkword mismatch failurePrasad Bg Ranganath2018-05-171-1/+21
* HW447585, HW447589, HW439303, Fix CDD1.2 security settingNick Klazynski2018-05-171-1/+84
* PM: Fix FFDC collection for HWP p9_collect_suspend_ffdc.Prem Shanker Jha2018-05-172-179/+199
* jgr18042600 Changed rx_recal_abort_dl_mask=0 for cumulus HW446964John Rell2018-05-041-0/+24
* Savory Insomnia -- revert to ordered tlbie mode for CumulusJoe McGill2018-05-033-3/+62
* TM workaround for HW443982Nick Klazynski2018-05-031-4/+11
* PM: Fixes for Livelock ScenariosRahul Batra2018-04-261-0/+1
* Risk level 3/4/5 support: Step 1 - backward compatibility and v6 imageClaus Michael Olsen2018-04-241-1/+1
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