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path: root/src/import/chips/p9/procedures/xml
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* configure FBC pump mode in SBEJoe McGill2017-01-151-5/+4
* p9_getecid -- set PCIE DD1.0x workaround attributesJoe McGill2017-01-151-0/+34
* Add MSS customization support from CRP0 Lx MVPDJoe McGill2017-01-041-35/+1
* Security control override disable support - p9_setup_sbe_configSoma BhanuTej2017-01-041-19/+1
* Hcode: add a new xml error fileYue Du2017-01-042-1/+39
* p9.fbc.scan.initfile -- clock off MCSYNC staging latchesJoe McGill2017-01-011-0/+18
* HW396520: DD1 workaround skip flushmode inhibit drop in cache hwpYue Du2016-12-202-0/+21
* PM: Added support for CME/SGPE flags in respective image header.Prem Shanker Jha2016-12-201-0/+18
* Add Memory Subsystem FIR supportBrian Silver2016-12-201-0/+17
* Adding in defect HW395947,HW930007 to INT initfilesJenny Huynh2016-12-201-1/+72
* Add EC workaround for PHY training bad bit processingBrian Silver2016-12-201-1/+20
* scan inits for lab workaround for DI bug HW392781Shelton Leung2016-11-301-0/+17
* Remove unused SBE attributesSantosh Puranik2016-11-281-126/+1
* Adding workaround for HW930007 and HW386013Jenny Huynh2016-11-211-0/+18
* p9_sbe_lpc_init fix with GPIO resetCHRISTINA L. GRAVES2016-11-212-0/+20
* p9_sbe_attr_setup updatesAnusha Reddy Rangareddygari2016-11-212-0/+5
* Istep4: Enable poll for DPLL lock in p9_hcd_cache_dpll_setupYue Du2016-11-212-1/+22
* Add new attribute file that contains pervasive SBE only attrscrgeddes2016-11-151-0/+26
* MPIPL Start Chipops and Mpipl istep implementationRaja Das2016-11-111-0/+4
* Add EC feature levels to MSS workaroundsBrian Silver2016-11-101-12/+140
* PM: Customization of CME and SGPE rings in HOMER.Prem Shanker Jha2016-11-101-0/+14
* nest_attributes -- add initToZero tags for chip contained executionJoe McGill2016-11-101-0/+10
* sector buffer,pulse mode attributesAnusha Reddy Rangareddygari2016-11-082-0/+34
* p9_psi_init -- parametrize link speed (half/full)Joe McGill2016-10-311-0/+18
* PPM reg collision (HW389511) work-around: Special Wake-upChristopher Riedl2016-10-261-0/+17
* cache/core/l2_stopclocks updatesYue Du2016-10-263-138/+8
* p9.fbc.scan.initfile -- create initfile, add workaround for HW376651Joe McGill2016-10-181-0/+18
* Adding in system checkstop if anything fails and removing PHB targetsCHRISTINA L. GRAVES2016-10-181-0/+12
* ATTR_SBE_SYS_CONFIG is writeable now, to update it via Psu ChipopRaja Das2016-10-181-0/+1
* p9_pstate_paramter_block L2 commitSudheendra K Srivathsa2016-10-172-1/+87
* Add support for ATTR_PROC_FABRIC_PUMP_MODE in sbe attribute xmlSachin Gupta2016-10-151-2/+8
* Lab: DD1 VCS workaround fixYue Du2016-10-141-0/+5
* L2 for p9_sbe_check_quiesceCHRISTINA L. GRAVES2016-10-131-0/+199
* L2 HWP p9_pm_pfet_controlSumit Kumar2016-10-131-0/+66
* L1 and L2 for p9_l3_flush procedureCHRISTINA L. GRAVES2016-10-131-0/+62
* JET: Making HWP - proc_l2_flush, FAPI2.0 compliantBilicon Patil2016-10-131-0/+112
* HWP L2 delivery for p9_update_security_ctrlSantosh Balasubramanian2016-10-131-0/+10
* HW388878 VCS workaroundJoe McGill2016-10-121-3/+3
* Cache HWP: DD1 VCS WorkaroundYue Du2016-10-111-0/+18
* Change chip to unsecure always for DD1 chipsSoma BhanuTej2016-10-101-0/+18
* DD2 updates:p9_sbe_arrayinit,p9_sbe_tp_arrayinitAnusha Reddy Rangareddygari2016-10-102-24/+2
* p9_sbe_check_master_stop15 fix for runningGreg Still2016-10-101-13/+4
* Stop Clocks for MPIPL (Core & Cache(EQ))Raja Das2016-10-061-0/+3
* pervasive_attributes.xml -- add input refclock termination controlsJoe McGill2016-10-061-0/+23
* Organize PM plat and HWP attributesSangeetha T S2016-10-041-2/+2
* L2 version - p9_sbe_sequence_drtmSantosh2016-10-042-0/+14
* Fixing MC & EP attr_pg for sc model config - p9_sbe_attr.xmlSoma BhanuTej2016-10-031-4/+4
* Change p9_mss_freq_system to write attributes, errors for CronusBrian Silver2016-09-301-0/+2
* FFDC updates - p9_check_sbe_bootedAnusha Reddy Rangareddygari2016-09-301-1/+23
* xip_customize: Updated mailbox attribute support.Claus Michael Olsen2016-09-292-266/+117
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