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path: root/src/import/chips/p9/procedures/xml/attribute_info
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* Reserving HTM QueuesThi Tran2017-05-051-0/+17
* WOF: Additional fields needed in OCC Pstate Parameter block for WOFPrasad Bg Ranganath2017-05-051-0/+18
* p9_mss_setup_bars -- customize interleave granularityJoe McGill2017-05-041-0/+30
* p9_sbe_attributes.xml -- add entries for effective FBC IDsJoe McGill2017-05-041-0/+8
* Change RD_CTR workaround val and update attr nameJacob Harvey2017-04-281-8/+8
* L3 initfile updatesAlex Taft2017-04-281-17/+18
* Adding HW401552 to cxa initfile to workaround clockgating bugJenny Huynh2017-04-281-0/+17
* WOF: VRM timing, WOF and VDM enblement attributes additionsPrasad Bg Ranganath2017-04-281-1/+130
* Disable cp_me from the L3 for Nimbus DD1 and DD2.0.Luke Murray2017-04-281-0/+17
* INT scan initfile change to add workaround for HW408972Jenny Huynh2017-04-281-0/+18
* Updating HW363605 workaround to be applied to all chipsLuke Murray2017-04-281-17/+0
* p9_setup_bars -- support DD2 NPU SCOM address changesCHRISTINA L. GRAVES2017-04-201-0/+18
* p9_pstate_param_blk: Define VFRT table and initialize the dataPrasad Bg Ranganath2017-04-191-0/+37
* PM: Resonant Clocking Enablement - InfrastructureChristopher M. Riedl2017-04-191-6/+6
* STOP: Enable CHTMYue Du2017-04-181-0/+38
* Added read ctr bad delay workaroundStephen Glancy2017-04-181-0/+17
* Updating optimal larx/stcx dials for performanceLuke Murray2017-04-181-0/+24
* HW407123: Slow down xlink command rate for Nimbus DD1/2Jenny Huynh2017-04-181-0/+19
* Update filter pll settings as per HW407180Ben Gass2017-04-061-0/+18
* Fix for HW397129-set bit 52 in the ALTD_OPTION reg to keep MC fastpath enabledCHRISTINA L. GRAVES2017-04-062-0/+24
* Updating L3 LCO watermarks for HW406803Luke Murray2017-04-061-0/+17
* Adding good LCO settings to initfileLuke Murray2017-04-031-0/+41
* update DPLL and IVRM initsJoe McGill2017-03-311-0/+56
* disable noise window for DD1 HW406577Shelton Leung2017-03-311-0/+17
* p9_sbe_chiplet_reset,p9_sbe_arrayinitAnusha Reddy Rangareddygari2017-03-292-0/+41
* adding opencapi to ATTR_OPTICS_CONFIG_MODEJoshua Hannan2017-03-231-1/+3
* Attribute support of customization of Nimbus DD1 PCI reference clock speed.Thi Tran2017-03-233-3/+25
* HW406130: Reduce dma read requests from 16->8 in NX initsJenny Huynh2017-03-231-0/+18
* PM: Updated QPMR and SGPE Header with 24x7 offset and length.Prem Shanker Jha2017-03-231-4/+25
* Add risklevel for HW399624 due to perf penalty; Add HW405851Nick Klazynski2017-03-211-0/+17
* p9_abist: Support for p9ndd2Markus Dobler2017-03-161-0/+17
* p9_pstate_parameter_block: access #W and populate parameter block stucturePrasad Bg Ranganath2017-03-141-0/+23
* PM: Incorporated support for enabling/disabling queued scan mode.Prem Shanker Jha2017-03-141-0/+15
* Add ec_abst ring to p9n.hw_imageThi Tran2017-03-102-0/+21
* PM: Add CME_INSTRUCTION_TRACE_ENABLE attribute support for debug controlGreg Still2017-03-091-6/+27
* HW405413 : NCU sends data out of orderAlex Taft2017-03-091-0/+17
* PM: GPE timer fix (HW389045 - Update Shadow copy of TSEL)Greg Still2017-03-091-0/+17
* Scrubbing needs to stay off for DD2, bug HW405443Juan Medina2017-03-091-1/+2
* Set NDL IOValids based on configured NV links.Ben Gass2017-03-091-0/+36
* adding non hostboot mode to run_iplJoshua Hannan2017-03-091-1/+1
* PM: Addressed various observations on Hcode Image BuildPrem Shanker Jha2017-03-091-12/+12
* nest_attributes.xml -- add 'effective' FBC group/chip ID attributesJoe McGill2017-03-071-1/+38
* p9_start_cbs updatesAnusha Reddy Rangareddygari2017-03-031-0/+18
* enable prefetch drop for better MC fairnessShelton Leung2017-03-031-1/+18
* Reducing rng pace rate from 2000 -> 300 for HW403701Jenny Huynh2017-03-011-0/+17
* Support for VDM data from #W keyword of VPDMarty Gloff2017-02-281-0/+17
* PM: Added support for PGPE Boot/PGPE integrationPrem Shanker Jha2017-02-281-1/+9
* Updates to run HW VREF cal by defaultStephen Glancy2017-02-251-0/+34
* HW399609: DD1 changing core/nest hang limit or hang pulse dividerYue Du2017-02-241-0/+4
* adjust SRAM timingsJoe McGill2017-02-241-19/+2
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