Commit message (Expand) | Author | Age | Files | Lines | |
---|---|---|---|---|---|
* | SBE Quiesce Implementation for FIFO/PSU | Raja Das | 2016-09-30 | 1 | -2/+5 |
* | move C_PPM_SSHSRC setup from p9_hcd_core_scominit to p9_hcd_core_startclocks | Joe McGill | 2016-09-22 | 2 | -3/+6 |
* | Changing ATTR_PG from 32 to 16 bit | Anusha Reddy Rangareddygari | 2016-09-21 | 1 | -8/+2 |
* | CORE/CACHE: core/cache/l2_stopclocks Level 2 | Yue Du | 2016-09-20 | 1 | -1/+133 |
* | CORE/CACHE: add Level1 cache/l2/core stopclocks procedures | Yue Du | 2016-09-20 | 2 | -0/+126 |
* | Update file headers | Sachin Gupta | 2016-09-16 | 31 | -31/+31 |
* | p9_hcd_core_scominit -- invoke p9.core.scom.initfile | Joe McGill | 2016-09-11 | 1 | -1/+13 |
* | core_chiplet_reset: SCAN_RATIO set according to ATTR_DPLL_BYPASS: 0=4:1, 1=1:1 | Joe Dery | 2016-09-08 | 1 | -1/+21 |
* | SBE move import` | Shakeeb | 2016-09-01 | 33 | -0/+3541 |