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* Setting the HRMOR value for OPAL based systems.vinaybs62020-01-101-7/+22
* Run LPC Init to clean up errors on MPIPLDean Sanner2019-11-101-9/+22
* Updated HRMOR to 3968MB (64MB * 62) less thanHEADmasterMurulidhar Nataraju2019-04-041-5/+6
* Mark OB1 and OB2 present for AxoneSantosh Puranik2019-01-101-1/+2
* Axone chipId supportRaja Das2018-10-241-2/+5
* Simics check in case of spless system before modifying HRMOR to 4GBRaja Das2018-09-211-1/+1
* [SBE-ARCH1]HRMOR relocated to 4Gb for SPLess Opal systemRaja Das2018-08-301-9/+19
* Add hook to setup ATTR_SMF_CONFIGDean Sanner2018-08-281-0/+7
* Extract PROC_CHIP_MEM_TO_USE correctionspashabk-in2018-04-261-8/+6
* Handle only group ID if mem proc chip attribute not setspashabk-in2018-04-191-6/+9
* Update PROC_CHIP_MEM_TO_USE attribute based on valid bitspashabk-in2018-04-161-0/+46
* Revert "SBE Space optimisation" by moving ramming to pibmemShakeeb A. Pasha B K2018-03-291-0/+31
* Support new RISK level attribute valuesSachin Gupta2018-02-111-10/+7
* Initialise ATTR_BACKUP_SEEPROM_SELECTSachin Gupta2017-11-021-0/+18
* Make plat init attributes non-writableSantosh Puranik2017-10-271-2/+277
* Fuse core mode supportRaja Das2017-07-051-3/+8
* Add support for MC and MI targetsSantosh Puranik2017-06-091-9/+37
* Remove Endian SwitchesSantosh Puranik2017-06-011-9/+10
* FAPI Plat CleanupSantosh Puranik2017-05-311-0/+754
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