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talos-sbe
04-16-2019
07-25-2019
master
Blackbird™ SBE sources
Raptor Computing Systems
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Commit message (
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Author
Age
Files
Lines
*
Remove duplicate set of fabric topology attributes
Joe McGill
2016-01-21
3
-34
/
+7
*
Power Management Platform and Frequency Attributes
Greg Still
2016-01-21
1
-20
/
+0
*
Fix for mirroing
Sachin Gupta
2016-01-21
2
-1
/
+1
*
Level 2 HWP for p9_sbe_startclock_chiplets
Anusha Reddy Rangareddygari
2016-01-21
1
-0
/
+31
*
P9-XIP image build: initial implementation
Martin Peschke
2016-01-21
9
-0
/
+8254
*
p9_pm_pfet_init Level 2
Amit Kumar
2016-01-21
1
-2
/
+56
*
Fix all incorrect copyright prologs
Stephen Cprek
2016-01-21
1
-1
/
+1
*
Power Management Platform and Frequency Attributes
Greg Still
2016-01-21
1
-0
/
+812
*
New scom addresses const headers for chip 9031
Ben Gass
2016-01-19
1
-591
/
+501
*
Fix all incorrect copyright prologs
Stephen Cprek
2016-01-19
1
-1
/
+1
*
Intermediate updates for header files.
Ben Gass
2016-01-19
1
-626
/
+3
*
Regenerated header files from e9029
Ben Gass
2016-01-19
2
-2366
/
+6177
*
Generated from n10_e9024_tp023_spider_u223_01
Ben Gass
2016-01-19
2
-0
/
+12460
*
Compilation issue fix
Sachin Gupta
2015-12-21
1
-1
/
+1
*
Solve unused label compilation issue in sbe
Sachin Gupta
2015-12-21
1
-1
/
+1
*
Add values to CHIP_UNIT_POS for all pervasive chiplets
Santosh Puranik
2015-12-09
1
-1
/
+30
*
Makefile Infra
Sunil.Kumar
2015-12-08
11
-0
/
+333
*
Make OB1,OB2 (cumulus only) non-functional
Sachin Gupta
2015-12-08
1
-2
/
+2
*
Action file for SBE HWP
Sunil.Kumar
2015-12-08
1
-0
/
+145
*
p9_adu_access and p9_adu_setup L2 procedures
CHRISTINA L. GRAVES
2015-12-08
1
-0
/
+91
*
JET: Level 2, Make p9_pm_occ_control FAPI2.0 compilant
Sangeetha T S
2015-12-08
1
-3
/
+15
*
Suet.scomdef and chip.act
Michael Dye
2015-12-08
1
-0
/
+18
*
JET: SUET updates for p9_hcd_cache_startclocks and p9_hcd_core_startclocks
Sangeetha T S
2015-12-08
1
-0
/
+39
*
Refactor Suet Data File Structure
Bill Hoffa
2015-12-08
3
-0
/
+3
*
Entries for p9_sbe_load_bootloader
Sunil.Kumar
2015-12-04
1
-1
/
+8
*
Avoid hash collision in ppe.
Sachin Gupta
2015-12-04
1
-1
/
+1
*
Checking in the L2 p9_sbe_load_bootloader procedures
CHRISTINA L. GRAVES
2015-12-01
1
-0
/
+47
*
Changing data inputs from 64 to 8-bit array and adding firstGranule
CHRISTINA L. GRAVES
2015-12-01
1
-1
/
+1
*
Updates for p9_revert_sbe_mcs_setup, p9_sbe_mcs_setup (Level 2)
Joe McGill
2015-12-01
1
-2
/
+0
*
Checking in the L2 p9_sbe_load_bootloader procedures
CHRISTINA L. GRAVES
2015-12-01
2
-0
/
+142
*
Shift HWP content to align with desired EKB layout
Joe McGill
2015-12-01
3
-0
/
+333
*
Changing data inputs from 64 to 8-bit array and adding firstGranule
CHRISTINA L. GRAVES
2015-11-25
4
-17
/
+31
*
Attribute Xml required for ppe Repo
Sunil.Kumar
2015-11-25
1
-0
/
+55
*
Changing data inputs from 64 to 8-bit array and adding firstGranule
CHRISTINA L. GRAVES
2015-11-25
1
-2
/
+6
*
Updates for p9_revert_sbe_mcs_setup, p9_sbe_mcs_setup (Level 2)
Joe McGill
2015-11-25
1
-35
/
+16
*
FBC Level 1 procedures
Joe McGill
2015-11-25
1
-1
/
+1
*
Checking in the L2 p9_sbe_load_bootloader procedures
CHRISTINA L. GRAVES
2015-11-25
1
-0
/
+168
*
Shift HWP content to align with desired EKB layout
Joe McGill
2015-11-25
2
-0
/
+636
*
Adding target for lco_m, changed flags, changed INF to DBG
CHRISTINA L. GRAVES
2015-11-20
1
-4
/
+12
*
Checking in the L2 p9_pba_access and p9_pba_setup procedures
CHRISTINA L. GRAVES
2015-11-20
1
-0
/
+60
*
Changing address because of fix in the new model
CHRISTINA L. GRAVES
2015-11-20
1
-3
/
+1
*
Adding target for lco_m, changed flags, changed INF to DBG
CHRISTINA L. GRAVES
2015-11-20
6
-227
/
+218
*
Shift HWP content to align with desired EKB layout
Joe McGill
2015-11-20
7
-0
/
+1057
*
Fix for ppe compilatoin error
Sunil.Kumar
2015-11-20
3
-41
/
+131
*
PPE-HWP: [Level 2] Cache/Core chiplet_reset/init/scan0+startclocks
Yue Du
2015-11-19
2
-0
/
+120
*
Regenerated header files from e9029
Ben Gass
2015-11-19
5
-31917
/
+55297
*
Updates for p9_revert_sbe_mcs_setup, p9_sbe_mcs_setup (Level 2)
Joe McGill
2015-11-19
3
-59
/
+194
*
PPE-HWP: [Level 2] Cache/Core chiplet_reset/init/scan0+startclocks
Yue Du
2015-11-19
28
-948
/
+639
*
p9_sbe_setup_boot_freq Level 2 - Setup boot frequency
Sudheendra K Srivathsa
2015-11-19
1
-0
/
+10
*
Level 2 HWP p9_sbe_tp_chiplet_init3.C
Sunil.Kumar
2015-11-19
1
-24
/
+19
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