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* Checking in the L2 p9_sbe_load_bootloader proceduresCHRISTINA L. GRAVES2015-12-012-0/+142
* Shift HWP content to align with desired EKB layoutJoe McGill2015-12-013-0/+333
* Changing data inputs from 64 to 8-bit array and adding firstGranuleCHRISTINA L. GRAVES2015-11-254-17/+31
* Attribute Xml required for ppe RepoSunil.Kumar2015-11-251-0/+55
* Changing data inputs from 64 to 8-bit array and adding firstGranuleCHRISTINA L. GRAVES2015-11-251-2/+6
* Updates for p9_revert_sbe_mcs_setup, p9_sbe_mcs_setup (Level 2)Joe McGill2015-11-251-35/+16
* FBC Level 1 proceduresJoe McGill2015-11-251-1/+1
* Checking in the L2 p9_sbe_load_bootloader proceduresCHRISTINA L. GRAVES2015-11-251-0/+168
* Shift HWP content to align with desired EKB layoutJoe McGill2015-11-252-0/+636
* Adding target for lco_m, changed flags, changed INF to DBGCHRISTINA L. GRAVES2015-11-201-4/+12
* Checking in the L2 p9_pba_access and p9_pba_setup proceduresCHRISTINA L. GRAVES2015-11-201-0/+60
* Changing address because of fix in the new modelCHRISTINA L. GRAVES2015-11-201-3/+1
* Adding target for lco_m, changed flags, changed INF to DBGCHRISTINA L. GRAVES2015-11-206-227/+218
* Shift HWP content to align with desired EKB layoutJoe McGill2015-11-207-0/+1057
* Fix for ppe compilatoin errorSunil.Kumar2015-11-203-41/+131
* PPE-HWP: [Level 2] Cache/Core chiplet_reset/init/scan0+startclocksYue Du2015-11-192-0/+120
* Updates for p9_revert_sbe_mcs_setup, p9_sbe_mcs_setup (Level 2)Joe McGill2015-11-193-59/+194
* PPE-HWP: [Level 2] Cache/Core chiplet_reset/init/scan0+startclocksYue Du2015-11-1928-948/+639
* p9_sbe_setup_boot_freq Level 2 - Setup boot frequencySudheendra K Srivathsa2015-11-191-0/+10
* Level 2 HWP p9_sbe_tp_chiplet_init3.CSunil.Kumar2015-11-191-24/+19
* PPE-HWP: [Level 2] Cache/Core chiplet_reset/init/scan0+startclocksYue Du2015-11-181-0/+125
* PPE-HWP: [Level 2] Cache/Core chiplet_reset/init/scan0+startclocksYue Du2015-11-182-0/+228
* PPE-HWP: [Level 2] Cache/Core chiplet_reset/init/scan0+startclocksYue Du2015-11-183-0/+590
* PPE-HWP: [Level 2] Poweronoff Hcode Procedures using APIDavid Young2015-11-183-188/+0
* PPE-HWP: [Level 1] Cache + Core Hcode Procedures with API and Attribute definedYue Du2015-11-183-0/+188
* Updates for p9_revert_sbe_mcs_setup, p9_sbe_mcs_setup (Level 2)Joe McGill2015-11-173-144/+189
* Nest Level 2 SBE ProceduresJoe McGill2015-11-171-0/+32
* PPE-HWP: [Level 2] Cache/Core chiplet_reset/init/scan0+startclocksYue Du2015-11-171-0/+61
* PPE-HWP: [Level 2] Poweronoff Hcode Procedures using APIDavid Young2015-11-171-78/+0
* PPE-HWP: [Level 1] Cache + Core Hcode Procedures with API and Attribute definedYue Du2015-11-171-0/+78
* PPE-HWP: [Level 2] Cache/Core chiplet_reset/init/scan0+startclocksYue Du2015-11-172-0/+115
* PPE-HWP: [Level 2] Poweronoff Hcode Procedures using APIDavid Young2015-11-172-138/+0
* PPE-HWP: [Level 1] Cache + Core Hcode Procedures with API and Attribute definedYue Du2015-11-172-0/+138
* Missing PPE (SBE) attribute files into EKB for mirroringGreg Still2015-11-171-0/+680
* Missing PPE (SBE) attribute files into EKB for mirroringGreg Still2015-11-171-0/+340
* PPE-HWP: [Level 2] Cache/Core chiplet_reset/init/scan0+startclocksYue Du2015-11-172-0/+274
* PPE-HWP: [Level 2] Dllsetup Hcode ProcedureDavid Young2015-11-172-333/+0
* PPE-HWP: [Level 1] Cache + Core Hcode Procedures with API and Attribute definedYue Du2015-11-172-0/+333
* VBU IPL regression framework for isteps 0-5Joe McGill2015-11-061-1/+1
* FBC Level 1 proceduresJoe McGill2015-11-062-15/+435
* p9_mss_eff_grouping procedure (Level 1)Thi Tran2015-11-061-48/+233
* Add base FAPI2 attribute definitionsJoe McGill2015-11-061-7/+0
* Level 2 HWP for p9_sbe_tp_chiplet_init1Anusha Reddy Rangareddygari2015-11-062-23/+32
* Nest Level 2 SBE ProceduresJoe McGill2015-11-066-14/+521
* Makefile Infrastructure for SBE Level 2 HWPsSunil.Kumar2015-11-0613-10/+517
* PERV SBE: Level 2 Procedure - p9_sbe_tp_chiplet_resetAbhishek Agarwal2015-11-062-22/+34
* PERV SBE: Level 2 Procedure - p9_sbe_tp_chiplet_init1Abhishek Agarwal2015-11-062-26/+57
* Fix compilation issues in pervasiveSachin Gupta2015-11-061-2/+2
* PERV SBE: Level 2 Procedure - p9_sbe_tp_switch_gearsAbhishek Agarwal2015-11-062-22/+33
* Level 2 Procedure -p9_sbe_tp_chiplet_init3Sunil.Kumar2015-11-063-21/+164
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