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* Fence all chip-ops in QUIESCE statespashabk-in2018-05-156-31/+24
| | | | | | | | | Change-Id: I42ffb9db5503ad36636a989d54041220e159e6fc Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/57793 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: RAJA DAS <rajadas2@in.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Update backing buildspashabk-in2018-05-121-1/+1
| | | | | | | Change-Id: I5e6b4751351146736ff92867b8e77c24cabe3927 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/58732 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Shakeeb A. Pasha B K <shakeebbk@in.ibm.com>
* Adding p9c DD13 supportSoma BhanuTej2018-05-111-0/+7
| | | | | | | | | | | | | | | | | | | | -> p9_sim_model_boot.C -> p9_frequency_bucket.H -> cronus_auto_settings.H Change-Id: Ic3b099c7e43d673d861c83f33caede27f9b5d10e Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/58402 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Dev-Ready: Soma Bhanutej <soma.bhanu@in.ibm.com> Reviewed-by: Benjamin Gass <bgass@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Brent Wieman <bwieman@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/58455 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Nest perf counter cfg registersSantosh Balasubramanian2018-05-101-0/+65
| | | | | | | | | | | | Change-Id: I3da29182a99e6f1bcdeaa8e1312728098e727735 CQ: SW428146 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/57876 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/57896 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Enabled scomable state check before cache flush in mpiplRaja Das2018-05-071-16/+21
| | | | | | | | | | | | | | Chiplet Id of Ex0/Ex1 was same as EQ, which created the issue Now using CHIP_UNIT_POS to differentiate between Ex0/Ex1 CQ: SW423680 Change-Id: I9566227ddaba65cb6cb76888e2be8bc45cf36a76 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/58373 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Shakeeb A. Pasha B K <shakeebbk@in.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* jgr18042600 Changed rx_recal_abort_dl_mask=0 for cumulus HW446964John Rell2018-05-041-0/+24
| | | | | | | | | | | | | | | | | Change-Id: Id3f996b089f2c11581b6f6906a24033cebca9ad3 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/57920 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Christopher W. Steffen <cwsteffen@us.ibm.com> Dev-Ready: John G. Rell III <jgrell@us.ibm.com> Reviewed-by: Richard J. Knight <rjknight@us.ibm.com> Reviewed-by: Megan P. Nguyen <pmegan@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/57922 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Revert Tempopary fix to fail MPIPL if Cache is not scommableSachin Gupta2018-05-041-8/+0
| | | | | | | | | This reverts commit 104a5bd096f7650cca65f601197b7b1df7238407. Change-Id: Idf0b24a4704be3b3096f4c880d8a9ccccc13ed13 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/58335 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Tempopary fix to fail MPIPL if Cache is not scommableRaja Das2018-05-041-0/+8
| | | | | | | | | | | | Fail mpipl if any of the L2/L3 cache is not scommable, because of which sbe is going to skip cache purge. This is keep to the system in fail state so that data can be captured from registers to understand the system behaviour for Defect SW423680 Change-Id: Ieb9063f1f25fff0059514e58de0e4bb1d04fe400 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/57708 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Risk level 3/4/5 support: Step 2 - image update to TOR v7Claus Michael Olsen2018-05-032-1/+10
| | | | | | | | | | | | | | | | | | | | | | | | - This commit updates the image ring sections to TOR v7. - It will fail with EKB FSP CI until we include the prereq to the merged step 1 commit in PPE and HB. Key_Cronus_Test=XIP_REGRESS cmvc-prereq: 1053262 cmvc-prereq: 1053182 Change-Id: Ie7452fe42877297da4f0da5cd4e51c989b6ac28d Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/57421 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: James N. Klazynski <jklazyns@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/57432 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Savory Insomnia -- revert to ordered tlbie mode for CumulusJoe McGill2018-05-033-3/+62
| | | | | | | | | | | | | | | | | | | | | | - configure the fabric & unit snooper logic to operate in ordered/p8 tlbie mode - prohibit the nest mmu from snooping tlbie - adjust NCU tlbie stall settings - revert HW419330 fix on Cumulus only Change-Id: Idf18f81b08c4fb6e372fa4c544c023a8820bb37b CQ: HW440920 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56406 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com> Reviewed-by: LUKE MURRAY <murrayl@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56415 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* TM workaround for HW443982Nick Klazynski2018-05-031-4/+11
| | | | | | | | | | | | | | | | Change-Id: Ic688e695c6eb6589b88b76b4ecefa252b045bdf9 CQ: HW443982 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/57189 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Reviewed-by: Kevin F. Reick <reick@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/57197 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* PM: Fixes for Livelock ScenariosRahul Batra2018-04-261-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | -Fixes DPLL Ownership issues during Pstate Start -Fixes WOF Enablement and Quad/Core Active Update(STOP11/5) livelock scenario -Fixes PM Complex Suspend and Quad/Core Active Update(STOP11/5) livelock scenario -Fixes VDM Droop Suspend STOP entries livelock scenario Key_Cronus_Test=PM_REGRESS Change-Id: I14a0dece4c74bc04618f7d1f3838dbe273bace94 CQ: SW425778 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/57191 Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Reviewed-by: YUE DU <daviddu@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/57255 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Extract PROC_CHIP_MEM_TO_USE correctionspashabk-in2018-04-261-8/+6
| | | | | | | Change-Id: Iacf5297268c6c69b14ff6afbaa8c89cea267939a Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/57895 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Risk level 3/4/5 support: Step 1 - backward compatibility and v6 imageClaus Michael Olsen2018-04-249-176/+197
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Introducing RV_RL3/4/5 ring variant (RV) support for EC/EQ chiplets. - Dropping RV support for all chiplet's instance rings which saves 456 Quad bytes and 58 Nest bytes in Seeprom's TOR slots (compared to master). - Each additional risk level adds 144 bytes in Seeprom TOR slots. - Various changes to data names associated with ring variants to clarify that the notion of ring variants is now specific only to Common rings while Instance rings only have the BASE variant. - Also, removed backwards compatibility to TOR v5, i.e. from before we introduced RL2 in february. Assumption is that all images/drivers used in fips910/920 and OP920 are TOR v6. - This commit produces a TOR v6 image to ensure EKB FSP CI success. Key_Cronus_Test=XIP_REGRESS Change-Id: Icfcb1e68fd74a10ffc48ee7a5da528a8042ef3b1 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56973 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Kahn C. Evans <kahnevan@us.ibm.com> Reviewed-by: James N. Klazynski <jklazyns@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56982 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Revert changes to ipl_table.Cspashabk-in2018-04-241-25/+28
| | | | | | | | | | Reverting changes which were mistakenly taken in https://ralgit01.raleigh.ibm.com/gerrit1/#/c/56203/8 Change-Id: If364908ec493af79e8ab2e5e5c883e85b94a3ecb Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/57731 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Tested-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Adding p9n 2.3 support and p9n 2.3/p9c 1.2 security updateBen Gass2018-04-205-44/+103
| | | | | | | | | | | | | | | | CMVC-Prereq: 1051830 Change-Id: I21b0d9187443f2727f83df310bca2fb3ae0fd80c Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55376 Dev-Ready: Matt K. Light <mklight@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Soma Bhanutej <soma.bhanu@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56834 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Revert changes to EFF_FBC_GRP_CHIP_IDS modespashabk-in2018-04-202-7/+5
| | | | | | | | | | | | | | | | Change-Id: I4907eea62c2fa85bdf9ed193d1820fba84afc82f Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/57530 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Dean Sanner <dsanner@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Prachi Gupta <pragupta@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/57534 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Tested-by: Sachin Gupta <sgupta2m@in.ibm.com>
* PM: Clean up PM Reset and PM Complex SuspendChristian Geddes2018-04-201-2/+2
| | | | | | | | | | | | | | | | | | | | - Increase timeout in PM Complex Suspend from 10ms -> 500ms - Disable CME monitoring of PGPE heart beat loss before halting PGPE Key_Cronus_Test=PM_REGRESS Change-Id: I3fbb435ce694e7590e9e9570107347a621828402 CQ: SW424102 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56884 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56903
* Handle only group ID if mem proc chip attribute not setspashabk-in2018-04-191-6/+9
| | | | | | | | Change-Id: I51e52333463702222dab0a28ce3e9cfcd4346317 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/57446 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* make ATTR_START_CBS_FIFO_RESET_SKIP platInitMatt K. Light2018-04-181-0/+1
| | | | | | | | | | | | | | | Change-Id: Ia995817f30cca235b8c725feec27f7a14f26f924 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43311 Dev-Ready: Matt K. Light <mklight@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43317
* Adding changes to handle core checkstopsElizabeth Liner2018-04-182-2/+23
| | | | | | | | | | | | | | | | | | | | | At certain points during the IPL, we need to turn off unit checkstops and switch them to system checkstops. This HWP saves off the original value, turns unit to system checkstops, and then later restores them. Change-Id: Iebd1d4c5b69eae04f05b890c879d8dd88f0655d3 RTC:147565 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56331 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56347 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* p9_hcd_cache_scominit -- disable LCO unless using force_all_coresJoe McGill2018-04-181-2/+2
| | | | | | | | | | | | | | Change-Id: I938d01f60907444b65b2f3b08d0fdfc59433dc79 CQ: SW424941 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/57399 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: LUKE MURRAY <murrayl@us.ibm.com> Reviewed-by: Dean Sanner <dsanner@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/57404 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Fenced Enabled check along with vdd_pfet_disable_core for scomsRaja Das2018-04-171-6/+16
| | | | | | | | | | | | | | | | | In core stopstate2, only checking the vdd_pfet_disable_core is not enough before scoming for C_CLOCK_STAT_SL, since in stopstate2 fences are up, so need to check for fenced bit as well in C_NET_CTRL0 reg. Change-Id: If99dd3d357b6e07c56417edae0868c03f2f0b720 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/52993 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53809
* Consume PROC_MEM_TO_USE for alt memory configspashabk-in2018-04-165-55/+51
| | | | | | | | | | | | | | | Change-Id: Ideb3c3d2bbdbce8b773d51b86d9f97f2e654ca56 RTC:189091 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56197 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56203
* Update PROC_CHIP_MEM_TO_USE attribute based on valid bitspashabk-in2018-04-161-0/+46
| | | | | | | | | | | Handling memory swapping on different proc Change-Id: Ibe46dde78fe9fc163eefdbd1a2af3fb00fc09d5a Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55959 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: RAJA DAS <rajadas2@in.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Add PROC_MEM_TO_USE to SBEspashabk-in2018-04-131-1/+1
| | | | | | | | | | | | | Change-Id: I614bf9b59166dadd84ea5276845f2cd7d897c2cb Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/57053 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Elizabeth K. Liner <eliner@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/57056
* Disable scom state checking in L2/L3 flush in MPIPLSachin Gupta2018-04-121-25/+28
| | | | | | | Change-Id: I0e7883bd5ff835fe3797eec1187cf6c973b29ec6 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/57094 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Temporarily moving attribute to the system targetElizabeth Liner2018-04-101-0/+12
| | | | | | | | | | | | | | | | | | | | There were dependency issues between the FSP and hostboot changes. This commit is temporarily moving everything to the system target, so that we can get our changes through CI. We'll go back later and fix the target to the proc Change-Id: Ic2d63d10afe50342290a814a94fd2d07d7102fdf RTC:176434 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56814 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56825
* Abist proc update for SBE changesAbhishek Agarwal2018-04-092-0/+21
| | | | | | | | | | | | | | | Change-Id: I28a11ecc5f64498f495f1575c914c5d3120c6f23 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54243 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: SRINIVAS V. POLISETTY <srinivan@in.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Soma Bhanutej <soma.bhanu@in.ibm.com> Reviewed-by: PARVATHI RACHAKONDA <prachako@in.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56789 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* S0/S1 enabled for SBERaja Das2018-04-0913-129/+490
| | | | | | | | | | | RTC: 159756 Change-Id: I01532623ea575fa669be28b3c19bac9c8cd7e7b4 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49474 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Shakeeb A. Pasha B K <shakeebbk@in.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* security whitelist -- add X0 instance of DL IOE control registerJoe McGill2018-04-051-0/+1
| | | | | | | | | | | | | | | | | X1, X2 instances were added previously for Nimbus, but missed X0 instance physical address needed in Cumulus Change-Id: Iece6927e63eb0c7d432d078ef22f29b245a233b0 CQ: SW423484 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56774 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Reviewed-by: SANTOSH BALASUBRAMANIAN <sbalasub@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56775
* p9_sbe_lpc_init: Fix cycle sim delay loopSoma BhanuTej2018-04-051-2/+3
| | | | | | | | | | | | | | | | | | Adding additional delay during polling for LPC status Issue encountered in GSD2PIB mode Awan simulations only Change-Id: I220843de8c37fa578ea26ea253345a380666a1d7 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56724 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: SRINIVAS V. POLISETTY <srinivan@in.ibm.com> Reviewed-by: Abhishek Agarwal <abagarw8@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56779 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Update backing buildspashabk-in2018-04-051-1/+1
| | | | | | | Change-Id: I31ed8a77903932318f3a9fa25597c6966cc7148d Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56783 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Update sbe-debug tool to use ecc_enable optionSachin Gupta2018-04-041-1/+2
| | | | | | | | | | Change-Id: Icd016488fea012fddb692f32cb9ccfbcb62d9722 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56240 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Shakeeb A. Pasha B K <shakeebbk@in.ibm.com> Reviewed-by: RAJA DAS <rajadas2@in.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* move xlink psave configuration to SBEJoe McGill2018-04-031-1/+29
| | | | | | | | | | | | | | | | | | | | | | | 55058 added inits to prime the PPE for xlink psave the register touched is in the blacklist, so it can't be touched on slave chips via FSI in the ioe tl SCOM initifle -- this was triggering HW CI failures this commit simply shifts the register setup into the SBE, where it can be performed securely Change-Id: I57504ccfe4c5f7e71397d11c7468da42ec09f059 CQ: SW421691 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56252 Reviewed-by: DANIEL C. HOWE <dchowe@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56256 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Fix transposed memset arguments in p9_dd_addRichard J. Knight2018-04-031-1/+1
| | | | | | | | | | | | | | | | Change-Id: Ia0a0f185879cb090ffe5d5b68a166c76ea9f2b6c RTC:189887 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56279 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Claus M. Olsen <cmolsen@us.ibm.com> Reviewed-by: Prachi Gupta <pragupta@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56281 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Fix missing set_XX method for sbeTarget calloutRichard J. Knight2018-04-031-0/+2
| | | | | | | | | | | | | | | | | | -Update the error xml parser to include a set method for the callout target tag. Change-Id: I3ee886ed6a3665e1de5287ac17a008818268c1db Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54678 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Kahn C. Evans <kahnevan@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54683 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Updating ATTR_PROC_CHIP_MEM_TO_USE to use all bits of group and chip IDElizabeth Liner2018-04-021-1/+1
| | | | | | | | | | | | | | | | | | When first created, we assumed the group ID and chip ID's were both 2 bits, but they're actually 3. This is updating the attribute. Change-Id: Iabc112f7202d410bd7bceab53c3ad79a1df17368 RTC:176434 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56039 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56498
* Pass SBE Security Backdoor Bit to HB BootloaderIlya Smirnov2018-04-024-6/+14
| | | | | | | | | | | | | | | | | | | | Add a "SBE security backdoor" bit to reflect the state of the SBE security backdoor; the bit is passed to the hostboot bootloader from SBE. The new bit is the inverse of the ATTR_SECURITY_MODE attribute. Also bump the version of SBE/bootloader to reflect the change. Change-Id: Idf3009447c51c66306c043daf7f8189b8cbf2f36 RTC:188961 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56309 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56318
* PGPE: Error Handling SupportRahul Batra2018-04-021-29/+38
| | | | | | | | | | | | | | | | | | | Key_Cronus_Test=PM_REGRESS Change-Id: I00aca629108aeaca88db34eec8e408f3cd48ff7f CQ: SW414842 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48635 Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com> Reviewed-by: YUE DU <daviddu@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53326 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Run simics intially till SBE is bootedspashabk-in2018-04-022-0/+48
| | | | | | | | Change-Id: Iab0eb98231bb1f66944cbb5f990f80ab9e827e49 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56297 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Clear TPM deconfig bit during MPIPLSachin Gupta2018-04-011-0/+16
| | | | | | | | | | | CQ: SW420513 Change-Id: I3c1fc2fb09e2870c29a4b695ffa6d173ecaaf5bf Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55235 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: RAJA DAS <rajadas2@in.ibm.com> Reviewed-by: Shakeeb A. Pasha B K <shakeebbk@in.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Revert "SBE Space optimisation" by moving ramming to pibmemShakeeb A. Pasha B K2018-03-298-15/+61
| | | | | | | | | | | | | | | This reverts commit 2dce1d2d7fbbca6e1f917fb9c76632561c5a84b1. And move plat target init and plat attr init to seeprom Perfromace measurements - from sbe_tart to proc_attn_listen: Without this change: 3.433112590s With this change : 3.458556197s Change-Id: If6b5dfcae2e40aa5d0d608e1d01036546c525628 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56239 Reviewed-by: RAJA DAS <rajadas2@in.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Code restruct: ring_applyClaus Michael Olsen2018-03-298-551/+354
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Consolidating the three <ppe>_image_ring_generation functions into a single shared, and renamed, ring_section_generation function, - Moving several data centric functions into common_ringId API, - Use of sizeof(<type or var>) instead of hardcoded assumptions about structure or data type sizes, - Renaming of variables which makes sense in the context of the scope of this commit, such as: - ringBuffer renamed to ringSection - ringBufSize renamed to ringSectionSize and type changed to uint32_t - Removes the backward compatibility to TORV3/V4 and now only works with latest TOR version, i.e. 6 at this point. About the Hw_ImageBuild_Prereq: - 51511 must have fully propagated into all repos and drivers used in FSP CI tests before this commit (43175) can be merged. 43175 removes the TORV3/V4 backwards compatibility to support TOR ring sections that have TOR level DD coordination. Key_Cronus_Test=XIP_REGRESS Change-Id: I0af25fa623c1c523eb0297e475066497787f3d15 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43175 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Prachi Gupta <pragupta@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/52209 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Turn off PB.IOO.LL0.CONFIG_FAST_ASYNC_CROSS for Nimbus (HW409026)Ben Gass2018-03-291-0/+18
| | | | | | | | | | | | | | | | | | | | | Due to HW409026, PB.IOO.LL0.CONFIG_FAST_ASYNC_CROSS should be off for all Nimbus chips. Change-Id: Ib732be7ce3d3e64e3c0b9112a088bb9a8fed14c4 CQ: SW420220 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54789 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: ADRIAN BARRERA <abarrera@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Reviewed-by: Jeffrey W. Kellington <jwkellin@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54800 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Do not apply HW414958 to AxoneThi Tran2018-03-281-3/+28
| | | | | | | | | | | | | | | Change-Id: I6fcbc5f49fdce481c9525220bc69ad9c4e1ecf1b Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55945 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56014 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* HW438727 Disable clockgate to allow correct ODL error reportingJenny Huynh2018-03-281-0/+25
| | | | | | | | | | | | | | | | | | | | Additional change to scan init obus fir mask to all 1's to avoid any false reporting early in the IPL. Change-Id: I1501a050af5f723d968e5bfbb965d1ae3b567a97 CQ:HW438727 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54417 Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: DANIEL C. HOWE <dchowe@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54424 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Updated backing buildSachin Gupta2018-03-271-1/+1
| | | | | | | Change-Id: I75fc317676462149785773839f161847cb573325 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56290 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Update backing buildSachin Gupta2018-03-271-3/+0
| | | | | | | Change-Id: Iee198aeaeec6003bcec40b93fb47647ad15bf91f Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56284 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* PSU get capabilities chip-opspashabk-in2018-03-277-4/+358
| | | | | | | | | | | Support PSU get capabilities chipop Change-Id: I36980433aaa70323c5b2b80a89d8618d03ea8a60 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55091 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: RAJA DAS <rajadas2@in.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
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