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| author | Jenny Huynh <jhuynh@us.ibm.com> | 2018-02-20 09:21:04 -0600 |
|---|---|---|
| committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2018-03-28 21:01:52 -0400 |
| commit | d2cdf116e9ba6f168312be677360f31c2c9e27ba (patch) | |
| tree | 45eed11b5a95df83e1d1b6d67b2b36ea7b0a8d10 | |
| parent | 3caeecc053933762f73aa4ac95c4986ba800fc73 (diff) | |
| download | talos-sbe-d2cdf116e9ba6f168312be677360f31c2c9e27ba.tar.gz talos-sbe-d2cdf116e9ba6f168312be677360f31c2c9e27ba.zip | |
HW438727 Disable clockgate to allow correct ODL error reporting
Additional change to scan init obus fir mask to all 1's to
avoid any false reporting early in the IPL.
Change-Id: I1501a050af5f723d968e5bfbb965d1ae3b567a97
CQ:HW438727
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54417
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: DANIEL C. HOWE <dchowe@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54424
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
| -rw-r--r-- | src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml index 43083bc5..5f6b86c6 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml @@ -2863,6 +2863,31 @@ </attribute> <!-- ******************************************************************** --> <attribute> + <id>ATTR_CHIP_EC_FEATURE_HW438727</id> + <targetType>TARGET_TYPE_PROC_CHIP,TARGET_TYPE_PROC_CHIP</targetType> + <description> + Anything NDD20+,CDD10+: Disable clockgating to allow correct + errors to be reported in ODL c_err_rpt and other error capture + </description> + <chipEcFeature> + <chip> + <name>ENUM_ATTR_NAME_NIMBUS</name> + <ec> + <value>0x20</value> + <test>GREATER_THAN_OR_EQUAL</test> + </ec> + </chip> + <chip> + <name>ENUM_ATTR_NAME_CUMULUS</name> + <ec> + <value>0x10</value> + <test>GREATER_THAN_OR_EQUAL</test> + </ec> + </chip> + </chipEcFeature> + </attribute> + <!-- ******************************************************************** --> + <attribute> <id>ATTR_CHIP_EC_FEATURE_HW426891</id> <targetType>TARGET_TYPE_PROC_CHIP,TARGET_TYPE_PROC_CHIP</targetType> <description> |
