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-rw-r--r--src/test/testcases/testQuiesce.xml25
1 files changed, 2 insertions, 23 deletions
diff --git a/src/test/testcases/testQuiesce.xml b/src/test/testcases/testQuiesce.xml
index 9619b7ae..21794d9f 100644
--- a/src/test/testcases/testQuiesce.xml
+++ b/src/test/testcases/testQuiesce.xml
@@ -5,7 +5,7 @@
<!-- -->
<!-- OpenPOWER sbe Project -->
<!-- -->
-<!-- Contributors Listed Below - COPYRIGHT 2016,2017 -->
+<!-- Contributors Listed Below - COPYRIGHT 2016,2018 -->
<!-- [+] International Business Machines Corp. -->
<!-- -->
<!-- -->
@@ -28,25 +28,4 @@
<testcase>
<simcmd>run-python-file targets/p9_nimbus/sbeTest/testQuiesce.py</simcmd>
<exitonerror>yes</exitonerror>
- </testcase>
- <!-- A Get Capabilities chip-op should succeed post the Quiesce -->
- <testcase>
- <simcmd>run-python-file targets/p9_nimbus/sbeTest/testGetCapabilities.py</simcmd>
- <exitonerror>yes</exitonerror>
- </testcase>
- <!-- A GetScom/PutScom chip-op should succeed post the Quiesce -->
- <testcase>
- <simcmd>run-python-file targets/p9_nimbus/sbeTest/testPutGetScom.py</simcmd>
- <exitonerror>yes</exitonerror>
- </testcase>
- <!-- Taking out this test-case since this requires clock now, and we have
- already done stop clock before quiesce. Somehow there is dependency
- of clock with ADU, this used to work in DD1.
- We can't move stopclock testcase below this since stop clock is from
- seeprom region and quiesce prohibits seeprom access.
- Disabling ADU access after quiesce operation. -->
- <!-- An Adu put chip-op should succeed post the Quiesce -->
- <!--<testcase>
- <simcmd>run-python-file targets/p9_nimbus/sbeTest/testAduMem_noEccNoItag.py</simcmd>
- <exitonerror>yes</exitonerror>
- </testcase> -->
+ </testcase> \ No newline at end of file
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