diff options
Diffstat (limited to 'import/chips/p9/procedures/xml')
3 files changed, 59 insertions, 7 deletions
diff --git a/import/chips/p9/procedures/xml/attribute_info/nest_attributes.xml b/import/chips/p9/procedures/xml/attribute_info/nest_attributes.xml index 0c12fe00..56afc909 100644 --- a/import/chips/p9/procedures/xml/attribute_info/nest_attributes.xml +++ b/import/chips/p9/procedures/xml/attribute_info/nest_attributes.xml @@ -695,19 +695,34 @@ </attribute> <!-- ********************************************************************** --> <attribute> - <id>ATTR_ADU_XSCOM_BAR_BASE_ADDR</id> - <targetType>TARGET_TYPE_PROC_CHIP</targetType> - <description>Defines XSCOM base address on each processor level. - address provided by the MRW </description> + <id>ATTR_PROC_XSCOM_BAR_BASE_ADDR_OFFSET</id> + <targetType>TARGET_TYPE_SYSTEM</targetType> + <description>XSCOM BAR base address offset + creator: platform + consumer: p9_sbe_scominit + firmware notes: + Defines 16GB range (size implied) mapped for XSCOM usage + Attribute holds offset (relative to chip MMIO origin) to program into + chip address range field of BAR -- RA bits 22:29 + (excludes system/memory select/group/chip fields) + </description> <valueType>uint64</valueType> <persistRuntime/> <platInit/> </attribute> <!-- ********************************************************************** --> <attribute> - <id>ATTR_LPC_BASE_ADDR</id> - <targetType>TARGET_TYPE_PROC_CHIP</targetType> - <description>Defines LPC base address on each processor level.</description> + <id>ATTR_PROC_LPC_BAR_BASE_ADDR_OFFSET</id> + <targetType>TARGET_TYPE_SYSTEM</targetType> + <description>LPC BAR base address offset + creator: platform + consumer: p9_sbe_scominit + firmware notes: + Defines 4GB range (size implied) mapped for LPC usage + Attribute holds offset (relative to chip MMIO origin) to program into + chip address range field of BAR -- RA bits 22:31 + (excludes system/memory select/group/chip fields) + </description> <valueType>uint64</valueType> <persistRuntime/> <platInit/> diff --git a/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml b/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml index 96d72a93..4972e342 100644 --- a/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml +++ b/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml @@ -510,4 +510,16 @@ attribute tank <name>ATTR_CHIP_EC_FEATURE_VITL_CLOCK_GATING</name> <virtual/> </entry> + + <entry> + <name>ATTR_PROC_XSCOM_BAR_BASE_ADDR_OFFSET</name> + <value>0x000003FC00000000</value> + </entry> + + <entry> + <name>ATTR_PROC_LPC_BAR_BASE_ADDR_OFFSET</name> + <value>0x000003FB00000000</value> + </entry> + + </entries> diff --git a/import/chips/p9/procedures/xml/error_info/p9_sbe_scominit_errors.xml b/import/chips/p9/procedures/xml/error_info/p9_sbe_scominit_errors.xml index 0cac2485..97226c2d 100644 --- a/import/chips/p9/procedures/xml/error_info/p9_sbe_scominit_errors.xml +++ b/import/chips/p9/procedures/xml/error_info/p9_sbe_scominit_errors.xml @@ -24,4 +24,29 @@ <!-- IBM_PROLOG_END_TAG --> <!-- Halt codes for p9_sbe_scominit --> <hwpErrors> + <!-- ******************************************************************** --> + <hwpError> + <rc>RC_P9_SBE_SCOMINIT_XSCOM_BAR_ATTR_ERR</rc> + <description> + Procedure: p9_sbe_scominit + Invalid XSCOM BAR attribute configuration + </description> + <ffdc>TARGET</ffdc> + <ffdc>XSCOM_BAR</ffdc> + <ffdc>XSCOM_BAR_OFFSET</ffdc> + <ffdc>BASE_ADDR_MMIO</ffdc> + </hwpError> + <!-- ******************************************************************** --> + <hwpError> + <rc>RC_P9_SBE_SCOMINIT_LPC_BAR_ATTR_ERR</rc> + <description> + Procedure: p9_sbe_scominit + Invalid LPC BAR attribute configuration + </description> + <ffdc>TARGET</ffdc> + <ffdc>LPC_BAR</ffdc> + <ffdc>LPC_BAR_OFFSET</ffdc> + <ffdc>BASE_ADDR_MMIO</ffdc> + </hwpError> + <!-- ******************************************************************** --> </hwpErrors> |
