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+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: hwp/nest/p9_sbe_mcs_setup.C $ */
+/* */
+/* IBM CONFIDENTIAL */
+/* */
+/* PPE Project */
+/* */
+/* COPYRIGHT 2015 */
+/* [+] International Business Machines Corp. */
+/* */
+/* */
+/* The source code for this program is not published or otherwise */
+/* divested of its trade secrets, irrespective of what has been */
+/* deposited with the U.S. Copyright Office. */
+/* */
+/* IBM_PROLOG_END_TAG */
+//------------------------------------------------------------------------------
+/// @file p9_sbe_mcs_setup.C
+///
+/// @brief Configure one MCS unit on the master chip to low point of
+/// coherency acknowledge preparations(lpc_ack preps). in support
+/// of dcbz(Data Cache Block Zero) operations executed by HBI code
+/// (while still running cache contained prior to memory configuration).
+//------------------------------------------------------------------------------
+// *HWP HW Owner : Girisankar Paulraj <gpaulraj@in.ibm.com>
+// *HWP HW Backup Owner : Joe McGill <jcmgill@us.ibm.com>
+// *HWP FW Owner : Thi N. Tran <thi@us.ibm.com>
+// *HWP Team : Nest
+// *HWP Level : 1
+// *HWP Consumed by : SBE
+//------------------------------------------------------------------------------
+
+
+//## auto_generated
+#include "p9_sbe_mcs_setup.H"
+
+
+fapi2::ReturnCode p9_sbe_mcs_setup(const
+ fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> & i_target)
+{
+ FAPI_DBG("Entering ...");
+
+ FAPI_DBG("Exiting ...");
+
+ return fapi2::FAPI2_RC_SUCCESS;
+
+}
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