diff options
10 files changed, 1060 insertions, 19 deletions
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_common_stopclocks.C b/src/import/chips/p9/procedures/hwp/perv/p9_common_stopclocks.C new file mode 100644 index 00000000..ce3aef60 --- /dev/null +++ b/src/import/chips/p9/procedures/hwp/perv/p9_common_stopclocks.C @@ -0,0 +1,145 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_common_stopclocks.C $ */ +/* */ +/* OpenPOWER sbe Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2016,2017 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +//------------------------------------------------------------------------------ +/// @file p9_common_stopclocks.C +/// +/// @brief Common module for stopclocks +//------------------------------------------------------------------------------ +// *HWP HW Owner : Soma BhanuTej <soma.bhanu@in.ibm.com> +// *HWP HW Backup Owner : Srinivas V Naga <srinivan@in.ibm.com> +// *HWP FW Owner : Sunil Kumar <skumar8j@in.ibm.com> +// *HWP Team : Perv +// *HWP Level : 2 +// *HWP Consumed by : FSP:HB +//------------------------------------------------------------------------------ + + +//## auto_generated +#include "p9_common_stopclocks.H" +//## auto_generated +#include "p9_const_common.H" + +#include <p9_perv_scom_addresses.H> +#include <p9_perv_scom_addresses_fld.H> + + +/// @brief --Raise partial good fences +/// --set abstclk muxsel,syncclk_muxsel +/// +/// @param[in] i_target_chiplet Reference to TARGET_TYPE_PERV target +/// @return FAPI2_RC_SUCCESS if success, else error code. +fapi2::ReturnCode p9_common_stopclocks_cplt_ctrl_action_function( + const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chiplet) +{ + // Local variable and constant definition + fapi2::buffer <uint16_t> l_cplt_ctrl_init; + fapi2::buffer<uint32_t> l_attr_pg; + fapi2::buffer<uint64_t> l_data64; + FAPI_INF("Entering p9_common_stopclocks_cplt_ctrl_action_function..."); + + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PG, i_target_chiplet, l_attr_pg)); + + l_attr_pg.invert(); + l_attr_pg.extractToRight<20, 11>(l_cplt_ctrl_init); + + FAPI_DBG("Raise partial good fences"); + //Setting CPLT_CTRL1 register value + l_data64.flush<0>(); + l_data64.writeBit<PERV_1_CPLT_CTRL1_TC_VITL_REGION_FENCE> + (l_attr_pg.getBit<19>()); //CPLT_CTRL1.TC_VITL_REGION_FENCE = l_attr_pg.getBit<19>() + //CPLT_CTRL1.TC_ALL_REGIONS_FENCE = l_cplt_ctrl_init + l_data64.insertFromRight<4, 11>(l_cplt_ctrl_init); + FAPI_TRY(fapi2::putScom(i_target_chiplet, PERV_CPLT_CTRL1_CLEAR, l_data64)); + + FAPI_DBG("set abistclk_muxsel and syncclk_muxsel"); + //Setting CPLT_CTRL0 register value + l_data64.flush<0>(); + //CPLT_CTRL0.CTRL_CC_ABSTCLK_MUXSEL_DC = 1 + l_data64.setBit<PERV_1_CPLT_CTRL0_CTRL_CC_ABSTCLK_MUXSEL_DC>(); + //CPLT_CTRL0.TC_UNIT_SYNCCLK_MUXSEL_DC = 1 + l_data64.setBit<PERV_1_CPLT_CTRL0_TC_UNIT_SYNCCLK_MUXSEL_DC>(); + FAPI_TRY(fapi2::putScom(i_target_chiplet, PERV_CPLT_CTRL0_OR, l_data64)); + + FAPI_INF("Exiting p9_common_stopclocks_cplt_ctrl_action_function..."); + +fapi_try_exit: + return fapi2::current_err; + +} + +/// @brief Raise chiplet fence for chiplets +/// +/// @param[in] i_target_chip Reference to TARGET_TYPE_PERV target +/// @return FAPI2_RC_SUCCESS if success, else error code. +fapi2::ReturnCode p9_common_stopclocks_raise_fence( + const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chiplet) +{ + fapi2::buffer<uint64_t> l_data64; + FAPI_INF("Entering p9_common_stopclocks_raise_fence..."); + + FAPI_DBG("Raise chiplet fence"); + //Setting NET_CTRL0 register value + l_data64.flush<0>(); + l_data64.setBit<PERV_1_NET_CTRL0_FENCE_EN>(); //NET_CTRL0.FENCE_EN = 1 + FAPI_TRY(fapi2::putScom(i_target_chiplet, PERV_NET_CTRL0_WOR, l_data64)); + + FAPI_INF("Exiting p9_common_stopclocks_raise_fence..."); + +fapi_try_exit: + return fapi2::current_err; + +} + +/// @brief -- Assert vital fence +/// -- set flush_inhibit to go out of flush mode +/// +/// @param[in] i_target_chiplet Reference to TARGET_TYPE_PERV target +/// @return FAPI2_RC_SUCCESS if success, else error code. +fapi2::ReturnCode p9_common_stopclocks_set_vitalfence_flushmode( + const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chiplet) +{ + fapi2::buffer<uint64_t> l_data64; + FAPI_INF("Entering p9_common_stopclocks_set_vitalfence_flushmode ..."); + + FAPI_DBG("Assert Vital Fence"); + //Setting CPLT_CTRL1 register value + l_data64.flush<0>(); + //CPLT_CTRL1.TC_VITL_REGION_FENCE = 1 + l_data64.setBit<PERV_1_CPLT_CTRL1_TC_VITL_REGION_FENCE>(); + FAPI_TRY(fapi2::putScom(i_target_chiplet, PERV_CPLT_CTRL1_OR, l_data64)); + + FAPI_DBG("Set flush_inhibit to go in to flush mode"); + //Setting CPLT_CTRL0 register value + l_data64.flush<0>(); + //CPLT_CTRL0.CTRL_CC_FLUSHMODE_INH_DC = 1 + l_data64.setBit<PERV_1_CPLT_CTRL0_CTRL_CC_FLUSHMODE_INH_DC>(); + FAPI_TRY(fapi2::putScom(i_target_chiplet, PERV_CPLT_CTRL0_OR, l_data64)); + + FAPI_INF("Exiting p9_common_stopclocks_set_vitalfence_flushmode..."); + +fapi_try_exit: + return fapi2::current_err; + +} diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_common_stopclocks.H b/src/import/chips/p9/procedures/hwp/perv/p9_common_stopclocks.H new file mode 100644 index 00000000..8809b8b1 --- /dev/null +++ b/src/import/chips/p9/procedures/hwp/perv/p9_common_stopclocks.H @@ -0,0 +1,54 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_common_stopclocks.H $ */ +/* */ +/* OpenPOWER sbe Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2016,2017 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +//------------------------------------------------------------------------------ +/// @file p9_common_stopclocks.H +/// +/// @brief Common module for stopclocks +//------------------------------------------------------------------------------ +// *HWP HW Owner : Soma BhanuTej <soma.bhanu@in.ibm.com> +// *HWP HW Backup Owner : Srinivas V Naga <srinivan@in.ibm.com> +// *HWP FW Owner : Sunil Kumar <skumar8j@in.ibm.com> +// *HWP Team : Perv +// *HWP Level : 2 +// *HWP Consumed by : FSP:HB +//------------------------------------------------------------------------------ + + +#ifndef _P9_COMMON_STOPCLOCKS_H_ +#define _P9_COMMON_STOPCLOCKS_H_ + + +#include <fapi2.H> + +fapi2::ReturnCode p9_common_stopclocks_cplt_ctrl_action_function( + const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chiplet); + +fapi2::ReturnCode p9_common_stopclocks_raise_fence( + const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chiplet); + +fapi2::ReturnCode p9_common_stopclocks_set_vitalfence_flushmode( + const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chiplet); + +#endif diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_cplt_stopclocks.C b/src/import/chips/p9/procedures/hwp/perv/p9_cplt_stopclocks.C new file mode 100644 index 00000000..0bf9aa3d --- /dev/null +++ b/src/import/chips/p9/procedures/hwp/perv/p9_cplt_stopclocks.C @@ -0,0 +1,133 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_cplt_stopclocks.C $ */ +/* */ +/* OpenPOWER sbe Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2016,2017 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +//------------------------------------------------------------------------------ +/// @file p9_cplt_stopclocks.C +/// +/// @brief stop clocks for Xb,Ob,Pcie +//------------------------------------------------------------------------------ +// *HWP HW Owner : Anusha Reddy Rangareddygari <anusrang@in.ibm.com> +// *HWP HW Backup Owner : Srinivas V Naga <srinivan@in.ibm.com> +// *HWP FW Owner : Sunil Kumar <skumar8j@in.ibm.com> +// *HWP Team : Perv +// *HWP Level : 2 +// *HWP Consumed by : FSP:HB +//------------------------------------------------------------------------------ + + +//## auto_generated +#include "p9_cplt_stopclocks.H" +//## auto_generated +#include "p9_const_common.H" + +#include <p9_perv_scom_addresses.H> +#include <p9_perv_scom_addresses_fld.H> +#include <p9_perv_sbe_cmn.H> +#include <p9_sbe_common.H> +#include <p9_common_stopclocks.H> + + +enum P9_CPLT_STOPCLOCKS_Private_Constants +{ + CLOCK_CMD = 0x2, + CLOCK_TYPES = 0x7, + DONT_STARTMASTER = 0x0, + DONT_STARTSLAVE = 0x0, + REGIONS_ALL_EXCEPT_PLL = 0x7FE, + STARTMASTER = 0x1, + STARTSLAVE = 0x1 +}; + +fapi2::ReturnCode p9_cplt_stopclocks(const + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target_chip, + const bool i_stop_xb, + const bool i_stop_ob, + const bool i_stop_pcie, + const bool i_stop_mc) +{ + fapi2::buffer<uint64_t> l_regions; + fapi2::buffer<uint8_t> l_attr_mc_sync; + fapi2::TargetFilter l_io_filter = fapi2::TARGET_FILTER_NONE ; + FAPI_INF("Entering ..."); + + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_MC_SYNC_MODE, i_target_chip, + l_attr_mc_sync)); + + + if (i_stop_xb) + { + l_io_filter = static_cast<fapi2::TargetFilter>(l_io_filter | + fapi2::TARGET_FILTER_XBUS); + } + + if (i_stop_ob) + { + l_io_filter = static_cast<fapi2::TargetFilter>(l_io_filter | + fapi2::TARGET_FILTER_ALL_OBUS); + } + + if (i_stop_pcie) + { + l_io_filter = static_cast<fapi2::TargetFilter>(l_io_filter | + fapi2::TARGET_FILTER_ALL_PCI); + } + + if( !l_attr_mc_sync ) + { + if (i_stop_mc) + { + l_io_filter = static_cast<fapi2::TargetFilter>(l_io_filter | + fapi2::TARGET_FILTER_ALL_MC); + } + } + + + for (auto l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + (l_io_filter, fapi2::TARGET_STATE_FUNCTIONAL)) + { + FAPI_DBG("Raise chiplet fence"); + FAPI_TRY(p9_common_stopclocks_raise_fence(l_trgt_chplt)); + + FAPI_DBG("Region setup"); + FAPI_TRY(p9_perv_sbe_cmn_regions_setup_64(l_trgt_chplt, REGIONS_ALL_EXCEPT_PLL, + l_regions)); + FAPI_DBG("Regions value: %#018lX", l_regions); + + FAPI_DBG("Call module clock start stop for xbus, obus, pcie, mc chiplets"); + FAPI_TRY(p9_sbe_common_clock_start_stop(l_trgt_chplt, CLOCK_CMD, + DONT_STARTSLAVE, DONT_STARTMASTER, l_regions, CLOCK_TYPES)); + + FAPI_DBG("Set vital fence and flushmode"); + FAPI_TRY(p9_common_stopclocks_set_vitalfence_flushmode(l_trgt_chplt)); + + FAPI_DBG("Call p9_common_stopclocks_cplt_ctrl_action_function "); + FAPI_TRY(p9_common_stopclocks_cplt_ctrl_action_function(l_trgt_chplt)); + } + + FAPI_INF("Exiting ..."); + +fapi_try_exit: + return fapi2::current_err; + +} diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_cplt_stopclocks.H b/src/import/chips/p9/procedures/hwp/perv/p9_cplt_stopclocks.H new file mode 100644 index 00000000..0292a235 --- /dev/null +++ b/src/import/chips/p9/procedures/hwp/perv/p9_cplt_stopclocks.H @@ -0,0 +1,68 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_cplt_stopclocks.H $ */ +/* */ +/* OpenPOWER sbe Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2016,2017 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +//------------------------------------------------------------------------------ +/// @file p9_cplt_stopclocks.H +/// +/// @brief stop clocks for Xb,Ob,Pcie +//------------------------------------------------------------------------------ +// *HWP HW Owner : Anusha Reddy Rangareddygari <anusrang@in.ibm.com> +// *HWP HW Backup Owner : Srinivas V Naga <srinivan@in.ibm.com> +// *HWP FW Owner : Sunil Kumar <skumar8j@in.ibm.com> +// *HWP Team : Perv +// *HWP Level : 2 +// *HWP Consumed by : FSP:HB +//------------------------------------------------------------------------------ + + +#ifndef _P9_CPLT_STOPCLOCKS_H_ +#define _P9_CPLT_STOPCLOCKS_H_ + + +#include <fapi2.H> + + +typedef fapi2::ReturnCode (*p9_cplt_stopclocks_FP_t)( + const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>&, const bool, const bool, + const bool, const bool); + +/// @brief StopClocks for Xb,Ob,Pcie +/// +/// @param[in] i_target_chip Reference to TARGET_TYPE_PROC_CHIP target +/// @param[in] i_stop_xb if true stop stopping clocks for xbus +/// @param[in] i_stop_ob if true stop stopping clocks for ob chiplet +/// @param[in] i_stop_pcie if true stop stopping clocks for pcie chiplet +/// @param[in] i_stop_mc if true stop stopping clocks for Mc chiplet +/// @return FAPI2_RC_SUCCESS if success, else error code. +extern "C" +{ + fapi2::ReturnCode p9_cplt_stopclocks(const + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target_chip, + const bool i_stop_xb = true, + const bool i_stop_ob = true, + const bool i_stop_pcie = true, + const bool i_stop_mc = true); +} + +#endif diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_nest_stopclocks.C b/src/import/chips/p9/procedures/hwp/perv/p9_nest_stopclocks.C new file mode 100644 index 00000000..7432de3f --- /dev/null +++ b/src/import/chips/p9/procedures/hwp/perv/p9_nest_stopclocks.C @@ -0,0 +1,182 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_nest_stopclocks.C $ */ +/* */ +/* OpenPOWER sbe Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2016,2017 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +//------------------------------------------------------------------------------ +/// @file p9_nest_stopclocks.C +/// +/// @brief stopclocks for nest,mc chiplets +//------------------------------------------------------------------------------ +// *HWP HW Owner : Anusha R Rangareddygari <anusrang@in.ibm.com> +// *HWP HW Backup Owner : Srinivas V Naga <srinivan@in.ibm.com> +// *HWP FW Owner : Sunil Kumar <skumar8j@in.ibm.com> +// *HWP Team : Perv +// *HWP Level : 2 +// *HWP Consumed by : FSP:HB +//------------------------------------------------------------------------------ + + +//## auto_generated +#include "p9_nest_stopclocks.H" +//## auto_generated +#include "p9_const_common.H" + +#include <p9_perv_scom_addresses.H> +#include <p9_perv_scom_addresses_fld.H> +#include <p9_perv_sbe_cmn.H> +#include <p9_sbe_common.H> +#include <p9_common_stopclocks.H> + + +enum P9_NEST_STOPCLOCKS_Private_Constants +{ + CLOCK_CMD = 0x2, + CLOCK_TYPES = 0x7, + DONT_STARTMASTER = 0x0, + DONT_STARTSLAVE = 0x0, + REGIONS_ALL_EXCEPT_PLL = 0x7FE, + STARTMASTER = 0x1, + STARTSLAVE = 0x1 +}; + +fapi2::ReturnCode p9_nest_stopclocks(const + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target_chip) +{ + uint8_t l_read_attr = 0; + fapi2::buffer<uint32_t> l_attr_pg; + fapi2::buffer<uint64_t> l_pg_vector; + fapi2::buffer<uint64_t> l_clock_regions; + fapi2::buffer<uint64_t> l_n3_clock_regions; + fapi2::buffer<uint16_t> l_ccstatus_regions; + fapi2::buffer<uint16_t> l_n3_ccstatus_regions; + FAPI_INF("Entering ..."); + + for (auto l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + (fapi2::TARGET_FILTER_NEST_WEST, fapi2::TARGET_STATE_FUNCTIONAL)) + { + FAPI_TRY(p9_perv_sbe_cmn_regions_setup_64(l_target_cplt, REGIONS_ALL_EXCEPT_PLL, + l_n3_clock_regions)); + FAPI_DBG("n3_clock_regions: %#018lX", l_n3_clock_regions); + + FAPI_TRY(p9_perv_sbe_cmn_regions_setup_16(l_target_cplt, REGIONS_ALL_EXCEPT_PLL, + l_n3_ccstatus_regions)); + FAPI_DBG("n3_ccstatus_regions: %#018lX", l_n3_ccstatus_regions); + } + + FAPI_DBG("Reading ATTR_MC_SYNC_MODE"); + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_MC_SYNC_MODE, i_target_chip, l_read_attr)); + + fapi2::TargetFilter l_nest_filter; + + if (l_read_attr) + { + l_nest_filter = static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_ALL_MC | + fapi2::TARGET_FILTER_ALL_NEST); + } + else + { + l_nest_filter = fapi2::TARGET_FILTER_ALL_NEST; + } + + for (auto l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + (l_nest_filter, fapi2::TARGET_STATE_FUNCTIONAL)) + { + FAPI_DBG("Raise chiplet fence"); + FAPI_TRY(p9_common_stopclocks_raise_fence(l_trgt_chplt)); + } + + for (auto l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + (static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_NEST_NORTH | + fapi2::TARGET_FILTER_NEST_SOUTH | fapi2::TARGET_FILTER_NEST_EAST), + fapi2::TARGET_STATE_FUNCTIONAL)) + { + FAPI_DBG("Regions value: %#018lX", l_clock_regions); + FAPI_TRY(p9_perv_sbe_cmn_regions_setup_64(l_trgt_chplt, REGIONS_ALL_EXCEPT_PLL, + l_clock_regions)); + + FAPI_DBG("Call module clock start stop for N0, N1, N2"); + FAPI_TRY(p9_sbe_common_clock_start_stop(l_trgt_chplt, CLOCK_CMD, STARTSLAVE, + DONT_STARTMASTER, l_clock_regions, CLOCK_TYPES)); + } + + for (auto l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + (fapi2::TARGET_FILTER_NEST_WEST, fapi2::TARGET_STATE_FUNCTIONAL)) + { + FAPI_DBG("Call module clock start stop for N3"); + FAPI_TRY(p9_sbe_common_clock_start_stop(l_target_cplt, CLOCK_CMD, + DONT_STARTSLAVE, STARTMASTER, l_n3_clock_regions, CLOCK_TYPES)); + } + + for (auto l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + (static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_NEST_NORTH | + fapi2::TARGET_FILTER_NEST_SOUTH | fapi2::TARGET_FILTER_NEST_EAST), + fapi2::TARGET_STATE_FUNCTIONAL)) + { + FAPI_TRY(p9_perv_sbe_cmn_regions_setup_16(l_trgt_chplt, REGIONS_ALL_EXCEPT_PLL, + l_ccstatus_regions)); + FAPI_DBG("Regions value: %#018lX", l_ccstatus_regions); + + FAPI_DBG("Call clockstatus check function for N0,N1,N2"); + FAPI_TRY(p9_sbe_common_check_cc_status_function(l_trgt_chplt, CLOCK_CMD, + l_ccstatus_regions, CLOCK_TYPES)); + } + + for (auto l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + (fapi2::TARGET_FILTER_NEST_WEST, fapi2::TARGET_STATE_FUNCTIONAL)) + { + FAPI_DBG("Call clockstatus check function for N3"); + FAPI_TRY(p9_sbe_common_check_cc_status_function(l_target_cplt, CLOCK_CMD, + l_n3_ccstatus_regions, CLOCK_TYPES)); + } + + if ( l_read_attr ) + { + for (auto l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + (fapi2::TARGET_FILTER_ALL_MC, fapi2::TARGET_STATE_FUNCTIONAL)) + { + FAPI_TRY(p9_perv_sbe_cmn_regions_setup_64(l_trgt_chplt, REGIONS_ALL_EXCEPT_PLL, + l_clock_regions)); + FAPI_DBG("Regions value: %#018lX", l_clock_regions); + + FAPI_DBG("Call module clock start stop for MC01, MC23."); + FAPI_TRY(p9_sbe_common_clock_start_stop(l_trgt_chplt, CLOCK_CMD, + DONT_STARTSLAVE, DONT_STARTMASTER, l_clock_regions, CLOCK_TYPES)); + } + } + + for (auto l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + (l_nest_filter, fapi2::TARGET_STATE_FUNCTIONAL)) + { + FAPI_DBG("Assert vital fence and flush mode for Nest and Mc chiplets"); + FAPI_TRY(p9_common_stopclocks_set_vitalfence_flushmode(l_trgt_chplt)); + + FAPI_DBG("Call p9_common_stopclocks_cplt_ctrl_action_function for Nest and Mc chiplets"); + FAPI_TRY(p9_common_stopclocks_cplt_ctrl_action_function(l_trgt_chplt)); + } + + FAPI_INF("Exiting ..."); + +fapi_try_exit: + return fapi2::current_err; + +} diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_nest_stopclocks.H b/src/import/chips/p9/procedures/hwp/perv/p9_nest_stopclocks.H new file mode 100644 index 00000000..a63e467e --- /dev/null +++ b/src/import/chips/p9/procedures/hwp/perv/p9_nest_stopclocks.H @@ -0,0 +1,59 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_nest_stopclocks.H $ */ +/* */ +/* OpenPOWER sbe Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2016,2017 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +//------------------------------------------------------------------------------ +/// @file p9_nest_stopclocks.H +/// +/// @brief stopclocks for nest,mc chiplets +//------------------------------------------------------------------------------ +// *HWP HW Owner : Anusha R Rangareddygari <anusrang@in.ibm.com> +// *HWP HW Backup Owner : Srinivas V Naga <srinivan@in.ibm.com> +// *HWP FW Owner : Sunil Kumar <skumar8j@in.ibm.com> +// *HWP Team : Perv +// *HWP Level : 2 +// *HWP Consumed by : FSP:HB +//------------------------------------------------------------------------------ + + +#ifndef _P9_NEST_STOPCLOCKS_H_ +#define _P9_NEST_STOPCLOCKS_H_ + + +#include <fapi2.H> + + +typedef fapi2::ReturnCode (*p9_nest_stopclocks_FP_t)( + const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>&); + +/// @brief To Stop the clocks for Nest Mc chiplets +/// +/// @param[in] i_target_chip Reference to TARGET_TYPE_PROC_CHIP target +/// @return FAPI2_RC_SUCCESS if success, else error code. +extern "C" +{ + fapi2::ReturnCode p9_nest_stopclocks(const + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target_chip); +} + +#endif diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_stopclocks.C b/src/import/chips/p9/procedures/hwp/perv/p9_stopclocks.C index 710e3ee4..eea9c5c8 100644 --- a/src/import/chips/p9/procedures/hwp/perv/p9_stopclocks.C +++ b/src/import/chips/p9/procedures/hwp/perv/p9_stopclocks.C @@ -25,21 +25,30 @@ //------------------------------------------------------------------------------ /// @file p9_stopclocks.C /// -/// @brief The purpose of this procedure is to stop the clocks in the non-core chiplets of the P9 processor chip +/// @brief The purpose of this procedure is to stop the clocks of the P9 processor chip //------------------------------------------------------------------------------ // *HWP HW Owner : Soma BhanuTej <soma.bhanu@in.ibm.com> // *HWP HW Backup Owner : Srinivas V Naga <srinivan@in.ibm.com> // *HWP FW Owner : Sunil Kumar <skumar8j@in.ibm.com> // *HWP Team : Perv -// *HWP Level : 1 +// *HWP Level : 2 // *HWP Consumed by : FSP:HB //------------------------------------------------------------------------------ //## auto_generated #include "p9_stopclocks.H" +#include <p9_perv_scom_addresses.H> +#include <p9_perv_scom_addresses_fld.H> +#include <p9_cplt_stopclocks.H> +#include <p9_nest_stopclocks.H> +#include <p9_tp_stopclocks.H> +#include <p9_hcd_core_stopclocks.H> +#include <p9_hcd_cache_stopclocks.H> +#include <p9_check_chiplet_states.H> +#include <p9_hcd_common.H> //------------------------------------------------------------------------------ -// Function definition: proc_stopclocks +// Function definition: p9_stopclocks // parameters: i_target => chip target // i_stop_nest_clks => True to stop NEST chiplet clocks (should default TRUE) // i_stop_mc_clks => True to stop MC chiplet clocks (should default TRUE) @@ -48,22 +57,225 @@ // i_stop_pcie_clks => True to stop PCIE chiplet clocks (should default TRUE) // i_stop_tp_clks => True to stop PERVASIVE (TP) chiplet clocks (should default FALSE) // i_stop_vitl_clks => True to stop PERVASIVE VITL clocks (should default FALSE) +// i_eq_clk_regions => EQ chiplet clock regions of which clocks should be stopped (default ALL_BUT_PLL_REFR) +// i_ex_select => EX chiplet selected for clocks stop (default BOTH_EX) // returns: FAPI_RC_SUCCESS if operation was successful, else error //------------------------------------------------------------------------------ -fapi2::ReturnCode p9_stopclocks(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target_chiplet, +fapi2::ReturnCode p9_stopclocks(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target_chip, const bool i_stop_nest_clks, const bool i_stop_mc_clks, const bool i_stop_xbus_clks, const bool i_stop_obus_clks, const bool i_stop_pcie_clks, const bool i_stop_tp_clks, - const bool i_stop_vitl_clks) + const bool i_stop_vitl_clks, + const p9hcd::P9_HCD_CLK_CTRL_CONSTANTS i_eq_clk_regions, + const p9hcd::P9_HCD_EX_CTRL_CONSTANTS i_ex_select) { + + fapi2::Target<fapi2::TARGET_TYPE_PERV> l_target_tp = i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + (fapi2::TARGET_FILTER_TP, fapi2::TARGET_STATE_FUNCTIONAL)[0]; + + fapi2::buffer<uint32_t> l_cfam_data; + fapi2::buffer<uint64_t> l_data64; + fapi2::buffer<uint64_t> l_sl_clock_status; + fapi2::buffer<uint64_t> l_nsl_clock_status; + fapi2::buffer<uint64_t> l_ary_clock_status; + + uint8_t l_cplt_scomable; + + bool pcb_is_bypassed = false; + bool pcb_clks_are_off = false; + bool perv_vitl_clks_off = false; + + bool tp_cplt_scomable = true; + bool nest_cplt_scomable = true; + bool xbus_cplt_scomable = true; + bool mc_cplt_scomable = true; + bool obus_cplt_scomable = true; + bool pcie_cplt_scomable = true; + FAPI_INF("p9_stopclocks : Entering ..."); + FAPI_DBG("p9_stopclocks : Input arguments recieved are \n\t i_stop_nest_clks = %s\n\t i_stop_mc_clks = %s\n\t i_stop_xbus_clks = %s\n\t i_stop_obus_clks = %s\n\t i_stop_pcie_clks = %s\n\t i_stop_tp_clks = %s\n\t i_stop_vitl_clks = %s\n", + btos(i_stop_nest_clks), btos(i_stop_mc_clks), btos(i_stop_xbus_clks), btos(i_stop_obus_clks), btos(i_stop_pcie_clks), + btos(i_stop_tp_clks), btos(i_stop_vitl_clks)); + FAPI_DBG("p9_stopclocks : Input CACHE arguments recieved are \n\t i_eq_clk_regions = %#018lx \n\t i_ex_select = %#018lx\n", + (uint64_t)i_eq_clk_regions, (uint64_t)i_ex_select); + + FAPI_DBG("p9_stopclocks : Check to see if the Perv Vital clocks are OFF"); + FAPI_TRY(fapi2::getCfamRegister(i_target_chip, PERV_PERV_CTRL0_FSI, l_cfam_data)); + + if(l_cfam_data.getBit<PERV_PERV_CTRL0_TP_VITL_CLKOFF_DC>()) + { + FAPI_INF("p9_stopclocks : Perv Vital clocks are off, so stopclocks cant go ahead"); + perv_vitl_clks_off = true; + } + else + { + perv_vitl_clks_off = false; + } + + if(!(perv_vitl_clks_off)) + { + FAPI_DBG("p9_stopclocks : Check to see if the PIB/PCB network is being bypassed"); + FAPI_TRY(fapi2::getCfamRegister(i_target_chip, PERV_ROOT_CTRL0_FSI, l_cfam_data)); + + if(l_cfam_data.getBit<PERV_ROOT_CTRL0_PIB2PCB_DC>()) + { + FAPI_INF("p9_stopclocks : The PIB/PCB is being bypassed, so only the TP chiplet is accessible."); + pcb_is_bypassed = true; + } + else + { + pcb_is_bypassed = false; + } + + + FAPI_INF("p9_stopclocks : Reading Clock Status Register in the TP chiplet to see if PIB and NET clocks are running. Bits 5 & 6 should be zero."); + + FAPI_DBG("Read Perv Clock Stat SL"); + FAPI_TRY(fapi2::getScom(l_target_tp, PERV_CLOCK_STAT_SL, l_sl_clock_status)); + FAPI_DBG("Perv CLOCK_STAT_SL Value : %#018lX", l_sl_clock_status); + + FAPI_DBG("Read Perv Clock Stat NSL"); + FAPI_TRY(fapi2::getScom(l_target_tp, PERV_CLOCK_STAT_NSL, l_nsl_clock_status)); + FAPI_DBG("Perv CLOCK_STAT_NSL Value : %#018lX", l_nsl_clock_status); + + FAPI_DBG("Read Perv Clock Stat ARY"); + FAPI_TRY(fapi2::getScom(l_target_tp, PERV_CLOCK_STAT_ARY, l_ary_clock_status)); + FAPI_DBG("Perv CLOCK_STAT_ARY Value : %#018lX", l_ary_clock_status); + + if(l_sl_clock_status.getBit<PERV_1_CLOCK_STAT_SL_STATUS_UNIT1>() || + l_sl_clock_status.getBit<PERV_1_CLOCK_STAT_SL_STATUS_UNIT2>() || + l_nsl_clock_status.getBit<PERV_1_CLOCK_STAT_NSL_STATUS_UNIT1>() || + l_nsl_clock_status.getBit<PERV_1_CLOCK_STAT_NSL_STATUS_UNIT2>() || + l_ary_clock_status.getBit<PERV_1_CLOCK_STAT_ARY_STATUS_UNIT1>() || + l_ary_clock_status.getBit<PERV_1_CLOCK_STAT_ARY_STATUS_UNIT2>()) + { + FAPI_INF("p9_stopclocks : At least one of the NET or PIB clocks is NOT running. May not be able to use the PCB fabric to access chiplets."); + pcb_clks_are_off = true; + } + else + { + pcb_clks_are_off = false; + } + + + if ( (pcb_is_bypassed == false) && (pcb_clks_are_off == false) ) + { + FAPI_DBG("p9_stopclocks : Call p9_check_chiplet_states to get the state of chip"); + FAPI_TRY(p9_check_chiplet_states(i_target_chip)); + + //To get the chiplet state from Attributes + for (auto l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + (static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_TP | fapi2::TARGET_FILTER_ALL_MC | fapi2::TARGET_FILTER_ALL_NEST + | fapi2::TARGET_FILTER_ALL_OBUS | fapi2::TARGET_FILTER_ALL_PCI | fapi2::TARGET_FILTER_XBUS), + fapi2::TARGET_STATE_FUNCTIONAL)) + { + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_TARGET_IS_SCOMMABLE, l_target_cplt, l_cplt_scomable)); + + if(!(l_cplt_scomable)) + { + uint8_t l_attr_unit_pos = 0; + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS, l_target_cplt, l_attr_unit_pos)); + + if (l_attr_unit_pos == 0x01) + { + tp_cplt_scomable = false; + } + else if (l_attr_unit_pos == 0x02 || l_attr_unit_pos == 0x03 || l_attr_unit_pos == 0x04 || l_attr_unit_pos == 0x05) + { + nest_cplt_scomable = false; + } + else if (l_attr_unit_pos == 0x06) + { + xbus_cplt_scomable = false; + } + else if (l_attr_unit_pos == 0x07 || l_attr_unit_pos == 0x08 ) + { + mc_cplt_scomable = false; + } + else if (l_attr_unit_pos == 0x09 || l_attr_unit_pos == 0x0A || l_attr_unit_pos == 0x0B || l_attr_unit_pos == 0x0C) + { + obus_cplt_scomable = false; + } + else if (l_attr_unit_pos == 0x0D || l_attr_unit_pos == 0x0E || l_attr_unit_pos == 0x0F ) + { + pcie_cplt_scomable = false; + } + } + } + + FAPI_DBG("p9_stopclocks : Chiplet scomable states \n\t tp_cplt_scomable = %s\n\t nest_cplt_scomable = %s\n\t xbus_cplt_scomable = %s\n\t mc_cplt_scomable = %s\n\t obus_cplt_scomable = %s\n\t pcie_cplt_scomable = %s\n", + btos(tp_cplt_scomable), btos(nest_cplt_scomable), btos(xbus_cplt_scomable), btos(mc_cplt_scomable), + btos(obus_cplt_scomable), btos(pcie_cplt_scomable)); + + // Core stopclocks + for (auto l_target_core : i_target_chip.getChildren<fapi2::TARGET_TYPE_CORE>(fapi2::TARGET_STATE_FUNCTIONAL)) + { + FAPI_INF("p9_stopclocks : Calling p9_hcd_core_stopclocks"); + FAPI_TRY(p9_hcd_core_stopclocks(l_target_core)); + } + + // L2 & Cache stopclocks + for (auto l_target_eq : i_target_chip.getChildren<fapi2::TARGET_TYPE_EQ>(fapi2::TARGET_STATE_FUNCTIONAL)) + { + FAPI_INF("p9_stopclocks : Calling p9_hcd_cache_stopclocks"); + FAPI_TRY(p9_hcd_cache_stopclocks(l_target_eq, i_eq_clk_regions, i_ex_select)); + } + + // Chiplet stopclocks + FAPI_INF("p9_stopclocks : Call p9_cplt_stopclocks function"); + FAPI_TRY(p9_cplt_stopclocks(i_target_chip, (i_stop_xbus_clks && xbus_cplt_scomable), (i_stop_obus_clks + && obus_cplt_scomable), (i_stop_pcie_clks && pcie_cplt_scomable), (i_stop_mc_clks && mc_cplt_scomable))); + + //Nest stopclocks + if((i_stop_nest_clks && nest_cplt_scomable)) + { + FAPI_INF("p9_stopclocks : Call p9_nest_stopclocks function"); + FAPI_TRY(p9_nest_stopclocks(i_target_chip)); + } + } + + // TP chiplet stopclocks + if((i_stop_tp_clks && tp_cplt_scomable) && !(pcb_is_bypassed == false && pcb_clks_are_off == true)) + { + FAPI_INF("p9_stopclocks : Call p9_tp_stopclocks function"); + FAPI_TRY(p9_tp_stopclocks(i_target_chip)); + } + + // Vital stopclocks + if(i_stop_vitl_clks) + { + FAPI_INF("p9_stopclocks : Stopping Pervasive VITAL clocks"); + + FAPI_DBG("Reading the current value of PERV_CTRL0 register"); + FAPI_TRY(fapi2::getCfamRegister(i_target_chip, PERV_PERV_CTRL0_FSI, l_cfam_data)); + + l_cfam_data.setBit<PERV_PERV_CTRL0_TP_VITL_CLKOFF_DC>(); + + FAPI_DBG("Writing the PERV_CTRL0 register TP_VITL_CLKOFF_DC=1"); + FAPI_TRY(fapi2::putCfamRegister(i_target_chip, PERV_PERV_CTRL0_FSI, l_cfam_data)); + + //Raising Fence 4 & 5 + FAPI_INF("p9_stopclocks : Raising FSI fence 4 and 5"); + + FAPI_DBG("Reading the current value of ROOT_CTRL0 register"); + FAPI_TRY(fapi2::getCfamRegister(i_target_chip, PERV_ROOT_CTRL0_FSI, l_cfam_data)); + + l_cfam_data.setBit<PERV_ROOT_CTRL0_FENCE4_DC>(); + l_cfam_data.setBit<PERV_ROOT_CTRL0_FENCE5_DC>(); + + FAPI_DBG("Writing the ROOT_CTRL0 register to raise FSI fence 4 and 5"); + FAPI_TRY(fapi2::putCfamRegister(i_target_chip, PERV_ROOT_CTRL0_FSI, l_cfam_data)); + } + } + FAPI_INF("p9_stopclocks : Exiting ..."); - return fapi2::FAPI2_RC_SUCCESS; +fapi_try_exit: + return fapi2::current_err; } diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_stopclocks.H b/src/import/chips/p9/procedures/hwp/perv/p9_stopclocks.H index 067c87c5..45efb63d 100644 --- a/src/import/chips/p9/procedures/hwp/perv/p9_stopclocks.H +++ b/src/import/chips/p9/procedures/hwp/perv/p9_stopclocks.H @@ -31,17 +31,17 @@ // *HWP HW Backup Owner : Srinivas V Naga <srinivan@in.ibm.com> // *HWP FW Owner : Sunil Kumar <skumar8j@in.ibm.com> // *HWP Team : Perv -// *HWP Level : 1 +// *HWP Level : 2 // *HWP Consumed by : FSP:HB //------------------------------------------------------------------------------ #ifndef _P9_STOPCLOCKS_H_ #define _P9_STOPCLOCKS_H_ - +#define btos(x) ((x)?"TRUE":"FALSE") #include <fapi2.H> - +#include <p9_hcd_common.H> typedef fapi2::ReturnCode (*p9_stopclocks_FP_t)(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>&, const bool, @@ -50,12 +50,14 @@ typedef fapi2::ReturnCode (*p9_stopclocks_FP_t)(const fapi2::Target<fapi2::TARGE const bool, const bool, const bool, - const bool); + const bool, + const p9hcd::P9_HCD_CLK_CTRL_CONSTANTS, + const p9hcd::P9_HCD_EX_CTRL_CONSTANTS ); extern "C" { /** - * @brief proc_stopclocks procedure: The purpose of this procedure is to stop the clocks in the non-core chiplets of the P9 processor chip + * @brief p9_stopclocks procedure: The purpose of this procedure is to stop the clocks of the P9 processor chip * * @param[in] i_target Reference to processor chip target * @param[in] i_stop_nest_clks True if NEST chiplet clocks should be stopped, else false @@ -65,17 +67,21 @@ extern "C" * @param[in] i_stop_pcie_clks True if PCIE chiplet clocks should be stopped, else false * @param[in] i_stop_tp_clks True if PERV (TP) chiplet clocks should be stopped, else false * @param[in] i_stop_vitl_clks True if PERV VITL clocks should be stopped, else false + * @param[in] i_eq_clk_regions EQ chiplet clock regions of which clocks should be stopped + * @param[in] i_ex_select EX chiplet selected for clocks stop * * @return ReturnCode */ - fapi2::ReturnCode p9_stopclocks(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target_chiplet, - const bool i_stop_nest_clks, - const bool i_stop_mc_clks, - const bool i_stop_xbus_clks, - const bool i_stop_obus_clks, - const bool i_stop_pcie_clks, - const bool i_stop_tp_clks, - const bool i_stop_vitl_clks); + fapi2::ReturnCode p9_stopclocks(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target_chip, + const bool i_stop_nest_clks = true, + const bool i_stop_mc_clks = true, + const bool i_stop_xbus_clks = true, + const bool i_stop_obus_clks = true, + const bool i_stop_pcie_clks = true, + const bool i_stop_tp_clks = false, + const bool i_stop_vitl_clks = false, + const p9hcd::P9_HCD_CLK_CTRL_CONSTANTS i_eq_clk_regions = p9hcd::CLK_REGION_ALL_BUT_PLL_REFR, + const p9hcd::P9_HCD_EX_CTRL_CONSTANTS i_ex_select = p9hcd::BOTH_EX); } #endif diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_tp_stopclocks.C b/src/import/chips/p9/procedures/hwp/perv/p9_tp_stopclocks.C new file mode 100644 index 00000000..508beaed --- /dev/null +++ b/src/import/chips/p9/procedures/hwp/perv/p9_tp_stopclocks.C @@ -0,0 +1,123 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_tp_stopclocks.C $ */ +/* */ +/* OpenPOWER sbe Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2016,2017 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +//------------------------------------------------------------------------------ +/// @file p9_tp_stopclocks.C +/// +/// @brief Stop clocks for tp chiplet +//------------------------------------------------------------------------------ +// *HWP HW Owner : Anusha Reddy Rangareddygari <anusrang@in.ibm.com> +// *HWP HW Backup Owner : Srinivas V Naga <srinivan@in.ibm.com> +// *HWP FW Owner : Sunil Kumar <skumar8j@in.ibm.com> +// *HWP Team : Perv +// *HWP Level : 2 +// *HWP Consumed by : FSP:HB +//------------------------------------------------------------------------------ + + +//## auto_generated +#include "p9_tp_stopclocks.H" + +#include <p9_perv_scom_addresses.H> +#include <p9_perv_scom_addresses_fld.H> +#include <p9_perv_sbe_cmn.H> +#include <p9_sbe_common.H> +#include <p9_common_stopclocks.H> + + +enum P9_TP_STOPCLOCKS_Private_Constants +{ + CLOCK_CMD = 0x2, + CLOCK_TYPES = 0x7, + DONT_STARTMASTER = 0x0, + DONT_STARTSLAVE = 0x0, + REGIONS_ALL_EXCEPT_PLL = 0x7FE, + STARTMASTER = 0x1, + STARTSLAVE = 0x1 +}; + +fapi2::ReturnCode p9_tp_stopclocks(const + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target_chip) +{ + fapi2::buffer<uint64_t> l_clock_regions; + fapi2::buffer<uint32_t> l_data32; + fapi2::buffer<uint32_t> l_data32_root_ctrl0; + FAPI_INF("p9_tp_stopclocks: Entering ..."); + + FAPI_DBG("p9_tp_stopclocks: Raise chiplet fence"); + //Setting PERV_CTRL0 register value + FAPI_TRY(fapi2::getCfamRegister(i_target_chip, PERV_PERV_CTRL0_FSI, l_data32)); + //CFAM.PERV_CTRL0.TP_FENCE_EN_DC = 1 + l_data32.setBit<PERV_PERV_CTRL0_SET_TP_FENCE_EN_DC>(); + FAPI_TRY(fapi2::putCfamRegister(i_target_chip, PERV_PERV_CTRL0_FSI, l_data32)); + + FAPI_DBG("p9_tp_stopclocks: Raise pib2pcb mux"); + //Setting ROOT_CTRL0 register value + FAPI_TRY(fapi2::getCfamRegister(i_target_chip, PERV_ROOT_CTRL0_FSI, + l_data32_root_ctrl0)); + //CFAM.ROOT_CTRL0.PIB2PCB_DC = 1 + l_data32_root_ctrl0.setBit<PERV_ROOT_CTRL0_SET_PIB2PCB_DC>(); + FAPI_TRY(fapi2::putCfamRegister(i_target_chip, PERV_ROOT_CTRL0_FSI, + l_data32_root_ctrl0)); + + FAPI_TRY(p9_perv_sbe_cmn_regions_setup_64( + i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV>(fapi2::TARGET_FILTER_TP, + fapi2::TARGET_STATE_FUNCTIONAL)[0], REGIONS_ALL_EXCEPT_PLL, l_clock_regions)); + FAPI_DBG("p9_tp_stopclocks: Regions value: %#018lX", l_clock_regions); + + FAPI_DBG("p9_tp_stopclocks: Call module clock start stop for Tp chiplet"); + FAPI_TRY(p9_sbe_common_clock_start_stop( + i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV>(fapi2::TARGET_FILTER_TP, + fapi2::TARGET_STATE_FUNCTIONAL)[0], CLOCK_CMD, DONT_STARTSLAVE, DONT_STARTMASTER, + l_clock_regions, CLOCK_TYPES)); + + FAPI_DBG("p9_tp_stopclocks: Assert vital fence and set flush_inhibit"); + FAPI_TRY(p9_common_stopclocks_set_vitalfence_flushmode( + i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV>(fapi2::TARGET_FILTER_TP, + fapi2::TARGET_STATE_FUNCTIONAL)[0])); + + FAPI_DBG("p9_tp_stopclocks: Raise partial good fences and set abist_muxsel, syncclk_muxsel"); + FAPI_TRY(p9_common_stopclocks_cplt_ctrl_action_function( + i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV>(fapi2::TARGET_FILTER_TP, + fapi2::TARGET_STATE_FUNCTIONAL)[0])); + + FAPI_INF("p9_tp_stopclocks: Raise OOB Mux"); + //Setting ROOT_CTRL0 register value + //CFAM.ROOT_CTRL0.OOB_MUX = 1 + l_data32_root_ctrl0.setBit<PERV_ROOT_CTRL0_SET_OOB_MUX>(); + FAPI_TRY(fapi2::putCfamRegister(i_target_chip, PERV_ROOT_CTRL0_FSI, + l_data32_root_ctrl0)); + + FAPI_INF("p9_tp_stopclocks: Raise Global Endpoint reset"); + //Setting ROOT_CTRL0 register value + //CFAM.ROOT_CTRL0.GLOBAL_EP_RESET_DC = 1 + l_data32_root_ctrl0.setBit<PERV_ROOT_CTRL0_SET_GLOBAL_EP_RESET_DC>(); + FAPI_TRY(fapi2::putCfamRegister(i_target_chip, PERV_ROOT_CTRL0_FSI, + l_data32_root_ctrl0)); + + FAPI_INF("p9_tp_stopclocks: Exiting ..."); +fapi_try_exit: + return fapi2::current_err; + +} diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_tp_stopclocks.H b/src/import/chips/p9/procedures/hwp/perv/p9_tp_stopclocks.H new file mode 100644 index 00000000..cd9a71e3 --- /dev/null +++ b/src/import/chips/p9/procedures/hwp/perv/p9_tp_stopclocks.H @@ -0,0 +1,59 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_tp_stopclocks.H $ */ +/* */ +/* OpenPOWER sbe Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2016,2017 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +//------------------------------------------------------------------------------ +/// @file p9_tp_stopclocks.H +/// +/// @brief Stop clocks for tp chiplet +//------------------------------------------------------------------------------ +// *HWP HW Owner : Anusha Reddy Rangareddygari <anusrang@in.ibm.com> +// *HWP HW Backup Owner : Srinivas V Naga <srinivan@in.ibm.com> +// *HWP FW Owner : Sunil Kumar <skumar8j@in.ibm.com> +// *HWP Team : Perv +// *HWP Level : 2 +// *HWP Consumed by : FSP:HB +//------------------------------------------------------------------------------ + + +#ifndef _P9_TP_STOPCLOCKS_H_ +#define _P9_TP_STOPCLOCKS_H_ + + +#include <fapi2.H> + + +typedef fapi2::ReturnCode (*p9_tp_stopclocks_FP_t)(const + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>&); + +/// @brief Stop clocks for TP chiplet +/// +/// @param[in] i_target_chip Reference to TARGET_TYPE_PROC_CHIP target +/// @return FAPI2_RC_SUCCESS if success, else error code. +extern "C" +{ + fapi2::ReturnCode p9_tp_stopclocks(const + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target_chip); +} + +#endif |
