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-rw-r--r--src/hwpf/plat_ring_traverse.C140
-rw-r--r--src/hwpf/plat_ring_traverse.H2
-rw-r--r--src/import/chips/centaur/utils/imageProcs/cen_ringId.C8
-rw-r--r--src/import/chips/centaur/utils/imageProcs/cen_ringId.H4
-rw-r--r--src/import/chips/common/utils/imageProcs/common_ringId.C232
-rw-r--r--src/import/chips/common/utils/imageProcs/common_ringId.H52
-rw-r--r--src/import/chips/p9/utils/imageProcs/p9_ringId.C38
-rw-r--r--src/import/chips/p9/utils/imageProcs/p9_ringId.H8
-rw-r--r--src/import/chips/p9/utils/imageProcs/p9_tor.C1
-rw-r--r--src/import/chips/p9/xip/p9_xip_tool.C25
-rw-r--r--src/import/tools/imageProcs/p9_ipl_build.C4
11 files changed, 357 insertions, 157 deletions
diff --git a/src/hwpf/plat_ring_traverse.C b/src/hwpf/plat_ring_traverse.C
index 98e391b1..0056cb6b 100644
--- a/src/hwpf/plat_ring_traverse.C
+++ b/src/hwpf/plat_ring_traverse.C
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER sbe Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2016,2017 */
+/* Contributors Listed Below - COPYRIGHT 2016,2018 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -39,7 +39,6 @@ const uint32_t RISK_LEVEL_MODE = 1;
#define RISK_LEVEL_MODE_OFFSET_IN_TOR 2
#define OVERRIDE_VARIANT_SIZE 1
-
///
/// @brief This is a plat pecific (SBE Plat) function that locates the
/// Ring Container in the image and calls the functin to decompress the
@@ -73,15 +72,9 @@ fapi2::ReturnCode findRS4InImageAndApply(
break;
}
- uint8_t l_torHdrSz;
TorHeader_t* torHeader = (TorHeader_t*)(g_seepromAddr +
l_section->iv_offset);
-
- if (torHeader->magic == TOR_MAGIC_SBE)
- {
- l_torHdrSz = sizeof(TorHeader_t);
- }
- else
+ if (torHeader->magic != TOR_MAGIC_SBE)
{
SBE_ERROR("ERROR: TOR magic header (=0x%08x) != TOR_MAGIC_SBE (=0x%08x)",
torHeader->magic, TOR_MAGIC_SBE);
@@ -90,12 +83,11 @@ fapi2::ReturnCode findRS4InImageAndApply(
}
SectionTOR* l_sectionTOR = (SectionTOR*)(g_seepromAddr +
- l_section->iv_offset +
- l_torHdrSz);
+ l_section->iv_offset);
l_rc = getRS4ImageFromTor(i_target, i_ringID, l_sectionTOR,
l_applyOverride,
- l_section->iv_offset + l_torHdrSz,
+ l_section->iv_offset,
i_ringMode);
if(l_rc != fapi2::FAPI2_RC_SUCCESS)
@@ -105,7 +97,6 @@ fapi2::ReturnCode findRS4InImageAndApply(
//Apply scanring from .ring section
l_applyOverride = true;
- l_section = NULL;
l_section =
&(l_hdr->iv_section[P9_XIP_SECTION_SBE_OVERRIDES]);
@@ -115,15 +106,13 @@ fapi2::ReturnCode findRS4InImageAndApply(
break;
}
- l_sectionTOR = NULL;
l_sectionTOR = (SectionTOR*)(g_seepromAddr +
- l_section->iv_offset +
- l_torHdrSz);
+ l_section->iv_offset);
l_rc = getRS4ImageFromTor(i_target, i_ringID, l_sectionTOR,
l_applyOverride,
- l_section->iv_offset + l_torHdrSz,
+ l_section->iv_offset,
i_ringMode);
}
while(0);
@@ -140,10 +129,15 @@ fapi2::ReturnCode getRS4ImageFromTor(
const fapi2::RingMode i_ringMode)
{
+ uint8_t l_torHdrSz = sizeof(TorHeader_t);
+ uint8_t l_torVersion = ((TorHeader_t*)i_sectionTOR)->version;
+ SectionTOR* l_sectionTOR = (SectionTOR*)((uint8_t*)i_sectionTOR + l_torHdrSz);
+ uint8_t l_numVarAdjust = 0;
+
// Determine the Offset ID and Ring Type for the given Ring ID.
uint32_t l_torOffset = 0;
RingType_t l_ringType = COMMON_RING;
- ChipletType_t l_chipLetType = INVALID_CHIPLET_TYPE;
+ ChipletType_t l_chipLetType = UNDEFINED_CHIPLET_TYPE;
fapi2::ReturnCode l_rc = fapi2::FAPI2_RC_SUCCESS;
do
@@ -177,154 +171,132 @@ fapi2::ReturnCode getRS4ImageFromTor(
{
case PERV_TYPE: // PERV
l_chipletData = PERV::g_chipletData;
- l_cpltRingVariantSz = i_applyOverride ? OVERRIDE_VARIANT_SIZE :
- l_chipletData.iv_num_ring_variants;
- l_sectionOffset = i_sectionTOR->TOC_PERV_COMMON_RING;
+ l_sectionOffset = l_sectionTOR->TOC_PERV_COMMON_RING;
if(INSTANCE_RING == l_ringType)
{
- l_sectionOffset = i_sectionTOR->TOC_PERV_INSTANCE_RING;
+ l_sectionOffset = l_sectionTOR->TOC_PERV_INSTANCE_RING;
}
break;
case N0_TYPE: // Nest - N0
l_chipletData = N0::g_chipletData;
- l_cpltRingVariantSz = i_applyOverride ? OVERRIDE_VARIANT_SIZE :
- l_chipletData.iv_num_ring_variants;
- l_sectionOffset = i_sectionTOR->TOC_N0_COMMON_RING;
+ l_sectionOffset = l_sectionTOR->TOC_N0_COMMON_RING;
if(INSTANCE_RING == l_ringType)
{
- l_sectionOffset = i_sectionTOR->TOC_N0_INSTANCE_RING;
+ l_sectionOffset = l_sectionTOR->TOC_N0_INSTANCE_RING;
}
break;
case N1_TYPE: // Nest - N1
l_chipletData = N1::g_chipletData;
- l_cpltRingVariantSz = i_applyOverride ? OVERRIDE_VARIANT_SIZE :
- l_chipletData.iv_num_ring_variants;
- l_sectionOffset = i_sectionTOR->TOC_N1_COMMON_RING;
+ l_sectionOffset = l_sectionTOR->TOC_N1_COMMON_RING;
if(INSTANCE_RING == l_ringType)
{
- l_sectionOffset = i_sectionTOR->TOC_N1_INSTANCE_RING;
+ l_sectionOffset = l_sectionTOR->TOC_N1_INSTANCE_RING;
}
break;
case N2_TYPE: // Nest - N2
l_chipletData = N2::g_chipletData;
- l_cpltRingVariantSz = i_applyOverride ? OVERRIDE_VARIANT_SIZE :
- l_chipletData.iv_num_ring_variants;
- l_sectionOffset = i_sectionTOR->TOC_N2_COMMON_RING;
+ l_sectionOffset = l_sectionTOR->TOC_N2_COMMON_RING;
if(INSTANCE_RING == l_ringType)
{
- l_sectionOffset = i_sectionTOR->TOC_N2_INSTANCE_RING;
+ l_sectionOffset = l_sectionTOR->TOC_N2_INSTANCE_RING;
}
break;
case N3_TYPE: // Nest - N3
l_chipletData = N3::g_chipletData;
- l_cpltRingVariantSz = i_applyOverride ? OVERRIDE_VARIANT_SIZE :
- l_chipletData.iv_num_ring_variants;
- l_sectionOffset = i_sectionTOR->TOC_N3_COMMON_RING;
+ l_sectionOffset = l_sectionTOR->TOC_N3_COMMON_RING;
if(INSTANCE_RING == l_ringType)
{
- l_sectionOffset = i_sectionTOR->TOC_N3_INSTANCE_RING;
+ l_sectionOffset = l_sectionTOR->TOC_N3_INSTANCE_RING;
}
break;
case XB_TYPE: // XB - XBus2
l_chipletData = XB::g_chipletData;
- l_cpltRingVariantSz = i_applyOverride ? OVERRIDE_VARIANT_SIZE :
- l_chipletData.iv_num_ring_variants;
- l_sectionOffset = i_sectionTOR->TOC_XB_COMMON_RING;
+ l_sectionOffset = l_sectionTOR->TOC_XB_COMMON_RING;
if(INSTANCE_RING == l_ringType)
{
- l_sectionOffset = i_sectionTOR->TOC_XB_INSTANCE_RING;
+ l_sectionOffset = l_sectionTOR->TOC_XB_INSTANCE_RING;
}
break;
case MC_TYPE: // MC - MC23
l_chipletData = MC::g_chipletData;
- l_cpltRingVariantSz = i_applyOverride ? OVERRIDE_VARIANT_SIZE :
- l_chipletData.iv_num_ring_variants;
- l_sectionOffset = i_sectionTOR->TOC_MC_COMMON_RING;
+ l_sectionOffset = l_sectionTOR->TOC_MC_COMMON_RING;
if(INSTANCE_RING == l_ringType)
{
- l_sectionOffset = i_sectionTOR->TOC_MC_INSTANCE_RING;
+ l_sectionOffset = l_sectionTOR->TOC_MC_INSTANCE_RING;
}
break;
case OB0_TYPE: // OB0
l_chipletData = OB0::g_chipletData;
- l_cpltRingVariantSz = i_applyOverride ? OVERRIDE_VARIANT_SIZE :
- l_chipletData.iv_num_ring_variants;
- l_sectionOffset = i_sectionTOR->TOC_OB0_COMMON_RING;
+ l_sectionOffset = l_sectionTOR->TOC_OB0_COMMON_RING;
if(INSTANCE_RING == l_ringType)
{
- l_sectionOffset = i_sectionTOR->TOC_OB0_INSTANCE_RING;
+ l_sectionOffset = l_sectionTOR->TOC_OB0_INSTANCE_RING;
}
break;
case OB1_TYPE: // OB1
l_chipletData = OB1::g_chipletData;
- l_cpltRingVariantSz = i_applyOverride ? OVERRIDE_VARIANT_SIZE :
- l_chipletData.iv_num_ring_variants;
- l_sectionOffset = i_sectionTOR->TOC_OB1_COMMON_RING;
+ l_sectionOffset = l_sectionTOR->TOC_OB1_COMMON_RING;
if(INSTANCE_RING == l_ringType)
{
- l_sectionOffset = i_sectionTOR->TOC_OB1_INSTANCE_RING;
+ l_sectionOffset = l_sectionTOR->TOC_OB1_INSTANCE_RING;
}
break;
case OB2_TYPE: // OB2
l_chipletData = OB2::g_chipletData;
- l_cpltRingVariantSz = i_applyOverride ? OVERRIDE_VARIANT_SIZE :
- l_chipletData.iv_num_ring_variants;
- l_sectionOffset = i_sectionTOR->TOC_OB2_COMMON_RING;
+ l_sectionOffset = l_sectionTOR->TOC_OB2_COMMON_RING;
if(INSTANCE_RING == l_ringType)
{
- l_sectionOffset = i_sectionTOR->TOC_OB2_INSTANCE_RING;
+ l_sectionOffset = l_sectionTOR->TOC_OB2_INSTANCE_RING;
}
break;
case OB3_TYPE: // OB3
l_chipletData = OB3::g_chipletData;
- l_cpltRingVariantSz = i_applyOverride ? OVERRIDE_VARIANT_SIZE :
- l_chipletData.iv_num_ring_variants;
- l_sectionOffset = i_sectionTOR->TOC_OB3_COMMON_RING;
+ l_sectionOffset = l_sectionTOR->TOC_OB3_COMMON_RING;
if(INSTANCE_RING == l_ringType)
{
- l_sectionOffset = i_sectionTOR->TOC_OB3_INSTANCE_RING;
+ l_sectionOffset = l_sectionTOR->TOC_OB3_INSTANCE_RING;
}
break;
@@ -332,75 +304,72 @@ fapi2::ReturnCode getRS4ImageFromTor(
case PCI0_TYPE: // PCI - PCI0
l_chipletData = PCI0::g_chipletData;
- l_cpltRingVariantSz = i_applyOverride ? OVERRIDE_VARIANT_SIZE :
- l_chipletData.iv_num_ring_variants;
- l_sectionOffset = i_sectionTOR->TOC_PCI0_COMMON_RING;
+ l_sectionOffset = l_sectionTOR->TOC_PCI0_COMMON_RING;
if(INSTANCE_RING == l_ringType)
{
- l_sectionOffset = i_sectionTOR->TOC_PCI0_INSTANCE_RING;
+ l_sectionOffset = l_sectionTOR->TOC_PCI0_INSTANCE_RING;
}
break;
case PCI1_TYPE: // PCI - PCI1
l_chipletData = PCI1::g_chipletData;
- l_cpltRingVariantSz = i_applyOverride ? OVERRIDE_VARIANT_SIZE :
- l_chipletData.iv_num_ring_variants;
- l_sectionOffset = i_sectionTOR->TOC_PCI1_COMMON_RING;
+ l_sectionOffset = l_sectionTOR->TOC_PCI1_COMMON_RING;
if(INSTANCE_RING == l_ringType)
{
- l_sectionOffset = i_sectionTOR->TOC_PCI1_INSTANCE_RING;
+ l_sectionOffset = l_sectionTOR->TOC_PCI1_INSTANCE_RING;
}
break;
case PCI2_TYPE: // PCI - PCI2
l_chipletData = PCI2::g_chipletData;
- l_cpltRingVariantSz = i_applyOverride ? OVERRIDE_VARIANT_SIZE :
- l_chipletData.iv_num_ring_variants;
- l_sectionOffset = i_sectionTOR->TOC_PCI2_COMMON_RING;
+ l_sectionOffset = l_sectionTOR->TOC_PCI2_COMMON_RING;
if(INSTANCE_RING == l_ringType)
{
- l_sectionOffset = i_sectionTOR->TOC_PCI2_INSTANCE_RING;
+ l_sectionOffset = l_sectionTOR->TOC_PCI2_INSTANCE_RING;
}
break;
case EQ_TYPE: // EQ - Quad 0 - Quad 5
l_chipletData = EQ::g_chipletData;
- l_cpltRingVariantSz = i_applyOverride ? OVERRIDE_VARIANT_SIZE :
- l_chipletData.iv_num_ring_variants;
-
+ if (l_torVersion < 6)
+ {
+ l_numVarAdjust = 1;
+ }
- l_sectionOffset = i_sectionTOR->TOC_EQ_COMMON_RING;
+ l_sectionOffset = l_sectionTOR->TOC_EQ_COMMON_RING;
l_CC_offset = 1;
l_RL_offset = 2;
if(INSTANCE_RING == l_ringType)
{
- l_sectionOffset = i_sectionTOR->TOC_EQ_INSTANCE_RING;
+ l_sectionOffset = l_sectionTOR->TOC_EQ_INSTANCE_RING;
}
break;
case EC_TYPE: // EC - Core 0 - 23
l_chipletData = EC::g_chipletData;
- l_cpltRingVariantSz = i_applyOverride ? OVERRIDE_VARIANT_SIZE :
- l_chipletData.iv_num_ring_variants;
+ if (l_torVersion < 6)
+ {
+ l_numVarAdjust = 1;
+ }
- l_sectionOffset = i_sectionTOR->TOC_EC_COMMON_RING;
+ l_sectionOffset = l_sectionTOR->TOC_EC_COMMON_RING;
l_CC_offset = 1;
l_RL_offset = 2;
if(INSTANCE_RING == l_ringType)
{
- l_sectionOffset = i_sectionTOR->TOC_EC_INSTANCE_RING;
+ l_sectionOffset = l_sectionTOR->TOC_EC_INSTANCE_RING;
}
break;
@@ -416,11 +385,14 @@ fapi2::ReturnCode getRS4ImageFromTor(
{
break;
}
+
+ l_cpltRingVariantSz = i_applyOverride ? OVERRIDE_VARIANT_SIZE :
+ (l_chipletData.iv_num_ring_variants - l_numVarAdjust);
FAPI_INF("l_sectionOffset %08x", l_sectionOffset);
// Determine the section TOR address for the ring
uint32_t* l_sectionAddr = reinterpret_cast<uint32_t*>(g_seepromAddr +
- i_sectionOffset + l_sectionOffset);
+ i_sectionOffset + l_torHdrSz + l_sectionOffset);
SBE_TRACE ("l_sectionAddr %08X", (uint32_t)l_sectionAddr);
diff --git a/src/hwpf/plat_ring_traverse.H b/src/hwpf/plat_ring_traverse.H
index 71e01ef3..e2782046 100644
--- a/src/hwpf/plat_ring_traverse.H
+++ b/src/hwpf/plat_ring_traverse.H
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER sbe Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2016,2017 */
+/* Contributors Listed Below - COPYRIGHT 2016,2018 */
/* [+] International Business Machines Corp. */
/* */
/* */
diff --git a/src/import/chips/centaur/utils/imageProcs/cen_ringId.C b/src/import/chips/centaur/utils/imageProcs/cen_ringId.C
index 19163824..ef34d38f 100644
--- a/src/import/chips/centaur/utils/imageProcs/cen_ringId.C
+++ b/src/import/chips/centaur/utils/imageProcs/cen_ringId.C
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER sbe Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2017 */
+/* Contributors Listed Below - COPYRIGHT 2017,2018 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -145,7 +145,7 @@ const GenRingIdList RING_ID_LIST_COMMON[] =
{"tp_pll_bndy_bucket_8", 0x6a, 0x01, 0x01, CEN_RING, 0x01030088},
};
-const RingVariantOrder RING_VARIANT_ORDER[] = { BASE, RL, NOT_VALID };
+const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT };
}; // namespace CEN
@@ -160,14 +160,14 @@ ChipletType_t CEN_RID::ringid_get_chiplet(RingId_t i_ringId)
}
void CEN_RID::ringid_get_chiplet_properties(
- ChipletType_t i_chiplet,
+ ChipletType_t i_chipletType,
ChipletData_t** o_cpltData,
GenRingIdList** o_ringComm,
GenRingIdList** o_ringInst,
RingVariantOrder** o_varOrder,
uint8_t* o_varNumb)
{
- switch (i_chiplet)
+ switch (i_chipletType)
{
case CEN_TYPE :
*o_cpltData = (ChipletData_t*) &CEN::g_chipletData;
diff --git a/src/import/chips/centaur/utils/imageProcs/cen_ringId.H b/src/import/chips/centaur/utils/imageProcs/cen_ringId.H
index a5f2d3ce..79a5ac00 100644
--- a/src/import/chips/centaur/utils/imageProcs/cen_ringId.H
+++ b/src/import/chips/centaur/utils/imageProcs/cen_ringId.H
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER sbe Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2016,2017 */
+/* Contributors Listed Below - COPYRIGHT 2016,2018 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -406,7 +406,7 @@ ringid_get_chiplet(RingId_t i_ringId);
// as determined by ringId
void
ringid_get_chiplet_properties(
- ChipletType_t i_chiplet,
+ ChipletType_t i_chipletType,
ChipletData_t** o_cpltData,
GenRingIdList** o_ringComm,
GenRingIdList** o_ringInst,
diff --git a/src/import/chips/common/utils/imageProcs/common_ringId.C b/src/import/chips/common/utils/imageProcs/common_ringId.C
index 3fa7aac5..13a5014b 100644
--- a/src/import/chips/common/utils/imageProcs/common_ringId.C
+++ b/src/import/chips/common/utils/imageProcs/common_ringId.C
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER sbe Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2017 */
+/* Contributors Listed Below - COPYRIGHT 2017,2018 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -44,11 +44,212 @@ const char* ppeTypeName[] = { "SBE",
const char* ringVariantName[] = { "BASE",
"CC",
"RL",
- "OVRD",
- "OVLY"
+ "RL2",
};
+#ifndef __HOSTBOOT_MODULE // This is only used by ring_apply in EKB
+static int get_ipl_base_param( char*& l_ringPath )
+{
+ l_ringPath = getenv("IPL_BASE");
+
+ if (l_ringPath == NULL)
+ {
+ MY_ERR("p9_ring_apply.C: ring path: IPL_BASE environment parameter not set.\n");
+ return INFRASTRUCT_RC_ENV_ERROR;
+ }
+
+ return INFRASTRUCT_RC_SUCCESS;
+}
+
+static int get_ipl_cache_contained_param( char*& l_ringPath)
+{
+ l_ringPath = getenv("IPL_CACHE_CONTAINED");
+
+ if (l_ringPath == NULL)
+ {
+ MY_ERR("p9_ring_apply.C: ring path: IPL_CACHE_CONTAINED environment parameter not set.\n");
+ return INFRASTRUCT_RC_ENV_ERROR;
+ }
+
+ return INFRASTRUCT_RC_SUCCESS;
+}
+
+static int get_ipl_risk_param( char*& l_ringPath)
+{
+ l_ringPath = getenv("IPL_RISK");
+
+ if (l_ringPath == NULL)
+ {
+ MY_ERR("p9_ring_apply.C: ring path: IPL_RISK environment parameter not set.\n");
+ return INFRASTRUCT_RC_ENV_ERROR;
+ }
+
+ return INFRASTRUCT_RC_SUCCESS;
+}
+
+static int get_runtime_base_param( char*& l_ringPath)
+{
+ l_ringPath = getenv("RUNTIME_BASE");
+
+ if (l_ringPath == NULL)
+ {
+ MY_ERR("p9_ring_apply.C: ring path: RUNTIME_BASE environment parameter not set.\n");
+ return INFRASTRUCT_RC_ENV_ERROR;
+ }
+
+ return INFRASTRUCT_RC_SUCCESS;
+}
+static int get_runtime_risk_param( char*& l_ringPath)
+{
+ l_ringPath = getenv("RUNTIME_RISK");
+
+ if (l_ringPath == NULL)
+ {
+ MY_ERR("p9_ring_apply.C: ring path: RUNTIME_RISK environment parameter not set.\n");
+ return INFRASTRUCT_RC_ENV_ERROR;
+ }
+
+ return INFRASTRUCT_RC_SUCCESS;
+}
+
+static int get_runtime_risk2_param( char*& l_ringPath)
+{
+ l_ringPath = getenv("RUNTIME_RISK2");
+
+ if (l_ringPath == NULL)
+ {
+ MY_ERR("p9_ring_apply.C: ring path: RUNTIME_RISK2 environment parameter not set.\n");
+ return INFRASTRUCT_RC_ENV_ERROR;
+ }
+
+ return INFRASTRUCT_RC_SUCCESS;
+}
+
+int ringid_get_raw_ring_file_path( uint32_t i_magic,
+ RingVariant_t i_ringVariant,
+ char* io_ringPath )
+{
+ int rc = INFRASTRUCT_RC_SUCCESS;
+ char* l_ringDir = NULL;
+
+ do
+ {
+
+ if ( i_magic == TOR_MAGIC_SBE )
+ {
+ if ( i_ringVariant == RV_BASE )
+ {
+ rc = get_ipl_base_param(l_ringDir);
+ }
+ else if ( i_ringVariant == RV_CC )
+ {
+ rc = get_ipl_cache_contained_param(l_ringDir);
+ }
+ else if ( i_ringVariant == RV_RL )
+ {
+ rc = get_ipl_risk_param(l_ringDir);
+ }
+ else if ( i_ringVariant == RV_RL2 )
+ {
+ // Valid RV for Quad chiplets but there's just no RL2 rings for SBE phase (by convention).
+ rc = TOR_NO_RINGS_FOR_VARIANT;
+ break;
+ }
+ else
+ {
+ MY_ERR("Invalid ringVariant(=%d) for TOR magic=0x%08x\n",
+ i_ringVariant, i_magic);
+ rc = TOR_INVALID_VARIANT;
+ }
+
+ if (rc)
+ {
+ break;
+ }
+
+ strcat(io_ringPath, l_ringDir);
+ strcat(io_ringPath, "/");
+ }
+ else if ( i_magic == TOR_MAGIC_CME ||
+ i_magic == TOR_MAGIC_SGPE )
+ {
+ if ( i_ringVariant == RV_BASE )
+ {
+ rc = get_runtime_base_param(l_ringDir);
+ }
+ else if ( i_ringVariant == RV_CC )
+ {
+ // Valid RV for Quad chiplets but there's just no CC rings for runtime phases (by convention).
+ rc = TOR_NO_RINGS_FOR_VARIANT;
+ break;
+ }
+ else if ( i_ringVariant == RV_RL )
+ {
+ rc = get_runtime_risk_param(l_ringDir);
+ }
+ else if ( i_ringVariant == RV_RL2 )
+ {
+ rc = get_runtime_risk2_param(l_ringDir);
+ }
+ else
+ {
+ MY_ERR("Invalid ringVariant(=%d) for TOR magic=0x%08x\n",
+ i_ringVariant, i_magic);
+ rc = TOR_INVALID_VARIANT;
+ }
+
+ if (rc)
+ {
+ break;
+ }
+
+ strcat(io_ringPath, l_ringDir);
+ strcat(io_ringPath, "/");
+ }
+ else if ( i_magic == TOR_MAGIC_CEN )
+ {
+ if ( i_ringVariant == RV_BASE )
+ {
+ rc = get_ipl_base_param(l_ringDir);
+ }
+ else if ( i_ringVariant == RV_RL )
+ {
+ rc = get_ipl_risk_param(l_ringDir);
+ }
+ else
+ {
+ MY_ERR("Invalid ringVariant(=%d) for TOR magic=0x%08x\n",
+ i_ringVariant, i_magic);
+ rc = TOR_INVALID_VARIANT;
+ }
+
+ if (rc)
+ {
+ break;
+ }
+
+ strcat(io_ringPath, l_ringDir);
+ strcat(io_ringPath, "/");
+ }
+ else if ( i_magic == TOR_MAGIC_OVRD ||
+ i_magic == TOR_MAGIC_OVLY )
+ {
+ // Path already fully qualified. Return io_ringPath as is.
+ }
+ else
+ {
+ MY_ERR("Unsupported value of TOR magic(=0x%X)\n", i_magic);
+ rc = TOR_INVALID_MAGIC_NUMBER;
+ }
+
+ }
+ while(0);
+
+ return rc;
+}
+
+#endif // End of ifndef __HOSTBOOT_MODULE
int ringid_get_noof_chiplets( ChipType_t i_chipType,
uint32_t i_torMagic,
@@ -58,6 +259,7 @@ int ringid_get_noof_chiplets( ChipType_t i_chipType,
{
case CT_P9N:
case CT_P9C:
+ case CT_P9A:
if ( i_torMagic == TOR_MAGIC_SBE ||
i_torMagic == TOR_MAGIC_OVRD ||
i_torMagic == TOR_MAGIC_OVLY )
@@ -105,7 +307,8 @@ int ringid_get_noof_chiplets( ChipType_t i_chipType,
int ringid_get_properties( ChipType_t i_chipType,
uint32_t i_torMagic,
- ChipletType_t i_chiplet,
+ uint8_t i_torVersion,
+ ChipletType_t i_chipletType,
ChipletData_t** o_chipletData,
GenRingIdList** o_ringIdListCommon,
GenRingIdList** o_ringIdListInstance,
@@ -117,18 +320,25 @@ int ringid_get_properties( ChipType_t i_chipType,
{
case CT_P9N:
case CT_P9C:
+ case CT_P9A:
if ( i_torMagic == TOR_MAGIC_SBE ||
i_torMagic == TOR_MAGIC_OVRD ||
i_torMagic == TOR_MAGIC_OVLY )
{
P9_RID::ringid_get_chiplet_properties(
- i_chiplet,
+ i_chipletType,
o_chipletData,
o_ringIdListCommon,
o_ringIdListInstance,
o_ringVariantOrder,
o_numVariants );
+ if ( i_torVersion < 6 &&
+ (i_chipletType == P9_RID::EQ_TYPE || i_chipletType == P9_RID::EC_TYPE) )
+ {
+ *o_numVariants = *o_numVariants - 1;
+ }
+
if ( i_torMagic == TOR_MAGIC_OVRD ||
i_torMagic == TOR_MAGIC_OVLY )
{
@@ -142,6 +352,11 @@ int ringid_get_properties( ChipType_t i_chipType,
*o_ringIdListInstance = (GenRingIdList*)P9_RID::EC::RING_ID_LIST_INSTANCE;
*o_ringVariantOrder = (RingVariantOrder*)P9_RID::EC::RING_VARIANT_ORDER;
*o_numVariants = P9_RID::EC::g_chipletData.iv_num_ring_variants;
+
+ if (i_torVersion < 6)
+ {
+ *o_numVariants = *o_numVariants - 1;
+ }
}
else if ( i_torMagic == TOR_MAGIC_SGPE )
{
@@ -150,6 +365,11 @@ int ringid_get_properties( ChipType_t i_chipType,
*o_ringIdListInstance = (GenRingIdList*)P9_RID::EQ::RING_ID_LIST_INSTANCE;
*o_ringVariantOrder = (RingVariantOrder*)P9_RID::EQ::RING_VARIANT_ORDER;
*o_numVariants = P9_RID::EQ::g_chipletData.iv_num_ring_variants;
+
+ if (i_torVersion < 6)
+ {
+ *o_numVariants = *o_numVariants - 1;
+ }
}
else
{
@@ -166,7 +386,7 @@ int ringid_get_properties( ChipType_t i_chipType,
i_torMagic == TOR_MAGIC_OVRD )
{
CEN_RID::ringid_get_chiplet_properties(
- i_chiplet,
+ i_chipletType,
o_chipletData,
o_ringIdListCommon,
o_ringIdListInstance,
diff --git a/src/import/chips/common/utils/imageProcs/common_ringId.H b/src/import/chips/common/utils/imageProcs/common_ringId.H
index aae2b767..af496be1 100644
--- a/src/import/chips/common/utils/imageProcs/common_ringId.H
+++ b/src/import/chips/common/utils/imageProcs/common_ringId.H
@@ -54,14 +54,20 @@ typedef uint32_t TorCpltOffset_t; // Type for offset value to chiplet's CMN or
typedef uint8_t myBoolean_t; // false:0, true:1, undefined:UNDEFINED_BOOLEAN
#define UNDEFINED_RING_ID (RingId_t)0xffff
-#define INVALID_RING_TYPE (RingType_t)0xff
-#define INVALID_CHIPLET_TYPE (ChipletType_t)0xff
+#define UNDEFINED_CHIPLET_TYPE (ChipletType_t)0xff
#define UNDEFINED_PPE_TYPE (PpeType_t)0xff
#define UNDEFINED_CHIP_TYPE (ChipType_t)0xff
+#define INVALID_RING_TYPE (RingType_t)0xff
+#define UNDEFINED_RING_VARIANT (RingVariant_t)0xff
#define UNDEFINED_RING_BLOCK_TYPE (RingBlockType_t)0xff;
+
+#define UNDEFINED_DD_LEVEL (uint8_t)0xff
+
#define MAX_TOR_RING_OFFSET (uint16_t)(256*256-1) // Max val of uint16
+
+#define MAX_RING_PATH_LENGTH (uint8_t)500
#define MAX_RING_NAME_LENGTH (uint8_t)50
-#define UNDEFINED_DD_LEVEL (uint8_t)0xff
+
#define UNDEFINED_BOOLEAN (myBoolean_t)0xff
// //
@@ -132,6 +138,7 @@ typedef uint16_t TorRingOffset_t; // Offset value to actual ring
//#define TOR_VERSION 3 // Added TOR magic header.
//#define TOR_VERSION 4 // TOR API code restructuring.
#define TOR_VERSION 5 // Removed TOR-level DD handling.
+//#define TOR_VERSION 6 // Added additional runtime risk level (RL2)
// TOR Magic values for top-level TOR ringSection and sub-ringSections
enum TorMagicNum
@@ -206,8 +213,9 @@ typedef struct
uint32_t scanScomAddress;
} GenRingIdList;
-// PPE types supported. Note that this enum also reflects the
-// order with which they appear in the HW image's .rings section.
+// P9 PPE types supported.
+// - This enum also reflects the order with which they appear in the HW image's .rings section.
+// - Do NOT make changes to the values or order of this enum.
enum PpeType
{
PT_SBE = 0x00,
@@ -216,17 +224,16 @@ enum PpeType
NUM_PPE_TYPES = 0x03
};
-// Do NOT make changes to the values or order of this enum. Some user
-// codes, like xip_tool, make assumptions about range and order.
+// P9 ring variants supported.
+// - This enum also reflects the order with which they appear in various images' .rings section.
+// - Do NOT make changes to the values or order of this enum.
enum RingVariant
{
- BASE = 0x00,
- CC = 0x01,
- RL = 0x02,
- OVERRIDE = 0x03,
- OVERLAY = 0x04,
- NUM_RING_VARIANTS = 0x05,
- NOT_VALID = 0xff
+ RV_BASE = 0x00,
+ RV_CC = 0x01,
+ RV_RL = 0x02,
+ RV_RL2 = 0x03,
+ NUM_RING_VARIANTS = 0x04,
};
extern const char* ppeTypeName[];
@@ -234,10 +241,13 @@ extern const char* ringVariantName[];
typedef struct
{
- RingVariant_t variant[3];
+ RingVariant_t variant[4];
} RingVariantOrder;
+// P9 ring types supported.
+// - This enum also reflects the order with which they appear in various images' .rings section.
+// - Do NOT make changes to the values or order of this enum.
enum RingType
{
COMMON_RING = 0,
@@ -289,7 +299,7 @@ typedef struct
{
uint8_t iv_torOffSet;
#ifndef __PPE__
- char iv_name[50];
+ char iv_name[MAX_RING_NAME_LENGTH];
#endif
ChipletType_t iv_type;
} RingProperties_t;
@@ -302,6 +312,7 @@ typedef struct
#define INFRASTRUCT_RC_FAILURE 1
#define INFRASTRUCT_RC_CODE_BUG 2
#define INFRASTRUCT_RC_USER_ERROR 3
+#define INFRASTRUCT_RC_ENV_ERROR 4
#define INFRASTRUCT_RC_NOOF_CODES 5 // Do not use as RC code
//
// TOR specific error codes
@@ -332,7 +343,13 @@ typedef struct
#define TOR_BUFFER_TOO_SMALL INFRASTRUCT_RC_NOOF_CODES + 21
#define TOR_TOO_MANY_DD_LEVELS INFRASTRUCT_RC_NOOF_CODES + 22
#define TOR_OFFSET_TOO_BIG INFRASTRUCT_RC_NOOF_CODES + 23
+#define TOR_NO_RINGS_FOR_VARIANT INFRASTRUCT_RC_NOOF_CODES + 24
+#ifndef __HOSTBOOT_MODULE // Only needed by ring_apply in EKB
+int ringid_get_raw_ring_file_path( uint32_t i_magic,
+ RingVariant_t i_ringVariant,
+ char* io_directory );
+#endif
int ringid_get_noof_chiplets( ChipType_t i_chipType,
uint32_t i_torMagic,
@@ -340,7 +357,8 @@ int ringid_get_noof_chiplets( ChipType_t i_chipType,
int ringid_get_properties( ChipType_t i_chipType,
uint32_t i_torMagic,
- ChipletType_t i_chiplet,
+ uint8_t i_torVersion,
+ ChipletType_t i_chipletType,
ChipletData_t** o_chipletData,
GenRingIdList** o_ringIdListCommon,
GenRingIdList** o_ringIdListInstance,
diff --git a/src/import/chips/p9/utils/imageProcs/p9_ringId.C b/src/import/chips/p9/utils/imageProcs/p9_ringId.C
index c0fff7dc..2dfe2cfa 100644
--- a/src/import/chips/p9/utils/imageProcs/p9_ringId.C
+++ b/src/import/chips/p9/utils/imageProcs/p9_ringId.C
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER sbe Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2016,2017 */
+/* Contributors Listed Below - COPYRIGHT 2016,2018 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -61,7 +61,7 @@ const GenRingIdList RING_ID_LIST_INSTANCE[] =
{"perv_repr" , 0x13, 0x01, 0x01, VPD_RING , 0x01034006},
{"occ_repr" , 0x14, 0x01, 0x01, VPD_RING , 0x01030806},
};
-const RingVariantOrder RING_VARIANT_ORDER[] = { BASE, RL, NOT_VALID };
+const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT };
};
@@ -85,7 +85,7 @@ const GenRingIdList RING_ID_LIST_INSTANCE[] =
{"n0_nx_repr" , 0x0a, 0x02, 0x02, VPD_RING , 0x02032006},
{"n0_cxa0_repr" , 0x0b, 0x02, 0x02, VPD_RING , 0x02031006},
};
-const RingVariantOrder RING_VARIANT_ORDER[] = { BASE, RL, NOT_VALID};
+const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT};
};
@@ -113,7 +113,7 @@ const GenRingIdList RING_ID_LIST_INSTANCE[] =
{"n1_ioo1_repr" , 0x0e, 0x03, 0x03, VPD_RING , 0x03030406},
{"n1_mcs23_repr" , 0x0f, 0x03, 0x03, VPD_RING , 0x03030206},
};
-const RingVariantOrder RING_VARIANT_ORDER[] = { BASE, RL, NOT_VALID};
+const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT};
};
@@ -137,7 +137,7 @@ const GenRingIdList RING_ID_LIST_INSTANCE[] =
{"n2_cxa1_repr" , 0x0a, 0x04, 0x04, VPD_RING , 0x04032006},
{"n2_psi_repr" , 0x0b, 0x04, 0x04, VPD_RING , 0x04030206},
};
-const RingVariantOrder RING_VARIANT_ORDER[] = { BASE, RL, NOT_VALID };
+const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT };
};
@@ -162,7 +162,7 @@ const GenRingIdList RING_ID_LIST_INSTANCE[] =
{"n3_mcs01_repr" , 0x0b, 0x05, 0x05, VPD_RING , 0x05030106},
{"n3_np_repr" , 0x0c, 0x05, 0x05, VPD_RING , 0x05030806},
};
-const RingVariantOrder RING_VARIANT_ORDER[] = { BASE, RL, NOT_VALID };
+const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT };
};
@@ -193,7 +193,7 @@ const GenRingIdList RING_ID_LIST_INSTANCE[] =
{"xb_io1_repr" , 0x15, 0x06, 0x06, VPD_RING , 0x06031106},
{"xb_io2_repr" , 0x16, 0x06, 0x06, VPD_RING , 0x06030886},
};
-const RingVariantOrder RING_VARIANT_ORDER[] = { BASE, RL, NOT_VALID };
+const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT };
};
@@ -224,7 +224,7 @@ const GenRingIdList RING_ID_LIST_INSTANCE[] =
{"mc_iom01_repr" , 0x11, 0x07, 0x08, VPD_RING , 0x07031006},
{"mc_iom23_repr" , 0x12, 0x07, 0x08, VPD_RING , 0x07030806},
};
-const RingVariantOrder RING_VARIANT_ORDER[] = { BASE, RL, NOT_VALID };
+const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT };
};
@@ -244,7 +244,7 @@ const GenRingIdList RING_ID_LIST_INSTANCE[] =
{
{"ob0_repr" , 0x07, 0x09, 0x09, VPD_RING , 0x09037006},
};
-const RingVariantOrder RING_VARIANT_ORDER[] = { BASE, RL, NOT_VALID };
+const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT };
};
@@ -264,7 +264,7 @@ const GenRingIdList RING_ID_LIST_INSTANCE[] =
{
{"ob1_repr" , 0x07, 0x0a, 0x0a, VPD_RING , 0x0A037006},
};
-const RingVariantOrder RING_VARIANT_ORDER[] = { BASE, RL, NOT_VALID };
+const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT };
};
@@ -284,7 +284,7 @@ const GenRingIdList RING_ID_LIST_INSTANCE[] =
{
{"ob2_repr" , 0x07, 0x0b, 0x0b, VPD_RING , 0x0B037006},
};
-const RingVariantOrder RING_VARIANT_ORDER[] = { BASE, RL, NOT_VALID };
+const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT };
};
@@ -304,7 +304,7 @@ const GenRingIdList RING_ID_LIST_INSTANCE[] =
{
{"ob3_repr" , 0x07, 0x0c, 0x0c, VPD_RING , 0x0C037006},
};
-const RingVariantOrder RING_VARIANT_ORDER[] = { BASE, RL, NOT_VALID };
+const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT };
};
@@ -322,7 +322,7 @@ const GenRingIdList RING_ID_LIST_INSTANCE[] =
{
{"pci0_repr" , 0x05, 0x0d, 0x0d, VPD_RING , 0x0D037006},
};
-const RingVariantOrder RING_VARIANT_ORDER[] = { BASE, RL, NOT_VALID };
+const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT };
};
@@ -340,7 +340,7 @@ const GenRingIdList RING_ID_LIST_INSTANCE[] =
{
{"pci1_repr" , 0x05, 0x0e, 0x0e, VPD_RING , 0x0E037806},
};
-const RingVariantOrder RING_VARIANT_ORDER[] = { BASE, RL, NOT_VALID };
+const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT };
};
@@ -358,7 +358,7 @@ const GenRingIdList RING_ID_LIST_INSTANCE[] =
{
{"pci2_repr" , 0x05, 0x0F, 0x0F, VPD_RING , 0x0F037C06},
};
-const RingVariantOrder RING_VARIANT_ORDER[] = { BASE, RL, NOT_VALID };
+const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT };
};
@@ -441,7 +441,7 @@ const GenRingIdList RING_ID_LIST_INSTANCE[] =
{"ex_l3_refr_repr" , 0x45, 0x10, 0x1b, VPD_RING , 0x10030046},
{"ex_l3_refr_time" , 0x46, 0x10, 0x1b, VPD_RING , 0x10030047},
};
-const RingVariantOrder RING_VARIANT_ORDER[] = { BASE, CC, RL };
+const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_CC, RV_RL, RV_RL2 };
};
@@ -460,7 +460,7 @@ const GenRingIdList RING_ID_LIST_INSTANCE[] =
{
{ "ec_repr" , 0x05, 0x20, 0x37, VPD_RING , 0x20037006},
};
-const RingVariantOrder RING_VARIANT_ORDER[] = { BASE, CC, RL };
+const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_CC, RV_RL, RV_RL2 };
};
@@ -475,14 +475,14 @@ ChipletType_t P9_RID::ringid_get_chiplet(RingId_t i_ringId)
}
void P9_RID::ringid_get_chiplet_properties(
- ChipletType_t i_chiplet,
+ ChipletType_t i_chipletType,
ChipletData_t** o_cpltData,
GenRingIdList** o_ringComm,
GenRingIdList** o_ringInst,
RingVariantOrder** o_varOrder,
uint8_t* o_varNumb)
{
- switch (i_chiplet)
+ switch (i_chipletType)
{
case PERV_TYPE :
*o_cpltData = (ChipletData_t*) &PERV::g_chipletData;
diff --git a/src/import/chips/p9/utils/imageProcs/p9_ringId.H b/src/import/chips/p9/utils/imageProcs/p9_ringId.H
index 5811830a..cf379816 100644
--- a/src/import/chips/p9/utils/imageProcs/p9_ringId.H
+++ b/src/import/chips/p9/utils/imageProcs/p9_ringId.H
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER sbe Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2016,2017 */
+/* Contributors Listed Below - COPYRIGHT 2016,2018 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -686,7 +686,7 @@ static const ChipletData_t g_chipletData =
66, // 66 common rings for Quad chiplet.
5, // 5 instance specific rings for each EQ chiplet
9, // 9 different rings since 2 per EX ring and 1 per EQ
- 3, // 3 ring variants: BASE, CC, RL
+ 4, // 4 ring variants: BASE, CC, RL, RL2
};
}; // end of namespace EQ
@@ -711,7 +711,7 @@ static const ChipletData_t g_chipletData =
6, // 6 common rings for Core chiplet
1, // 1 instance specific ring for each Core chiplet
1,
- 3, // 3 ring variants: BASE, CC, RL
+ 4, // 4 ring variants: BASE, CC, RL, RL2
};
}; // end of namespace EC
@@ -1252,7 +1252,7 @@ ringid_get_chiplet(RingId_t i_ringId);
// as determined by ringId
void
ringid_get_chiplet_properties(
- ChipletType_t i_chiplet,
+ ChipletType_t i_chipletType,
ChipletData_t** o_cpltData,
GenRingIdList** o_ringComm,
GenRingIdList** o_ringInst,
diff --git a/src/import/chips/p9/utils/imageProcs/p9_tor.C b/src/import/chips/p9/utils/imageProcs/p9_tor.C
index 8d8af340..56919312 100644
--- a/src/import/chips/p9/utils/imageProcs/p9_tor.C
+++ b/src/import/chips/p9/utils/imageProcs/p9_tor.C
@@ -92,6 +92,7 @@ int get_ring_from_ring_section( void* i_ringSection, // Ring secti
{
rc = ringid_get_properties( chipType,
torMagic,
+ torHeader->version,
iCplt,
&cpltData,
&ringIdListCommon,
diff --git a/src/import/chips/p9/xip/p9_xip_tool.C b/src/import/chips/p9/xip/p9_xip_tool.C
index 935867fe..3955b62d 100644
--- a/src/import/chips/p9/xip/p9_xip_tool.C
+++ b/src/import/chips/p9/xip/p9_xip_tool.C
@@ -40,8 +40,6 @@
#include <unistd.h>
#include <string>
-#undef P9_XIP_TOOL_VERBOSE
-
#include "p9_xip_image.h"
#include "common_ringId.H"
#ifndef __PPE__ // Needed on ppe side to avoid having to include various APIs
@@ -2066,17 +2064,17 @@ int dissectRingSectionTor( uint8_t* i_ringSection,
//--------------------
// Ring variant loop.
// - Base, cache, risk or just "base" if no ring variant
- for (ringVariant = 0; ringVariant < OVERRIDE; ringVariant++)
+ for (ringVariant = 0; ringVariant < NUM_RING_VARIANTS; ringVariant++)
{
- if ((torMagic == TOR_MAGIC_OVRD && ringVariant != BASE) ||
- (torMagic == TOR_MAGIC_OVLY && ringVariant != BASE) ||
- (torMagic == TOR_MAGIC_CEN && ringVariant == CC))
+ if ((torMagic == TOR_MAGIC_OVRD && ringVariant != RV_BASE) ||
+ (torMagic == TOR_MAGIC_OVLY && ringVariant != RV_BASE) ||
+ (torMagic == TOR_MAGIC_CEN && ringVariant == RV_CC))
{
continue;
}
//----------------------
- // Unique ring ID loop.
+ // Ring ID loop.
for (ringId = 0; ringId < numRingIds; ringId++)
{
@@ -2087,21 +2085,12 @@ int dissectRingSectionTor( uint8_t* i_ringSection,
// with the input value of instanceId, instanceInputId.
// - Start looping safely from 0 so that if instanceId is adjusted
// in tor_access_ring, i.e. in case it's an instance ring, it will
- // return a non-zeor value for instanceId.
+ // return a non-zero value for instanceId.
uint8_t instanceInputId;
for (instanceId = 0; instanceId <= INSTANCE_ID_MAX; instanceId++)
{
instanceInputId = instanceId;
-#ifdef P9_XIP_TOOL_VERBOSE
- fprintf( stderr, "Processing: "
- "DD=0x%02x "
- "PPE=%s "
- "Variant=%s "
- "RingID=%d "
- "InstanceID=0x%02x\n",
- ddLevel, ppeTypeName[ppeType], ringVariantName[ringVariant], ringId, instanceId);
-#endif
ringBlockSize = MAX_RING_BUF_SIZE_TOOL;
rc = tor_access_ring( i_ringSection,
@@ -2904,7 +2893,7 @@ int check_sbe_ring_section_size( void* i_hwImage,
rc = tor_get_block_of_rings( ringsSection,
i_ddLevel,
PT_SBE,
- NOT_VALID,
+ UNDEFINED_RING_VARIANT,
l_blockPtr,
l_blockSize);
diff --git a/src/import/tools/imageProcs/p9_ipl_build.C b/src/import/tools/imageProcs/p9_ipl_build.C
index 7e742ddc..e4b69117 100644
--- a/src/import/tools/imageProcs/p9_ipl_build.C
+++ b/src/import/tools/imageProcs/p9_ipl_build.C
@@ -126,7 +126,7 @@ int get_dd_level_rings_from_hw_image( char* i_hwImage,
rc = tor_get_block_of_rings( ringsSection,
i_ddLevel,
PT_SBE,
- NOT_VALID,
+ UNDEFINED_RING_VARIANT,
o_ringBlock,
o_blockSize );
@@ -152,7 +152,7 @@ int get_dd_level_rings_from_hw_image( char* i_hwImage,
rc = tor_get_block_of_rings( ringsSection,
i_ddLevel,
PT_SBE,
- NOT_VALID,
+ UNDEFINED_RING_VARIANT,
o_ringBlock,
o_blockSize );
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