diff options
| -rw-r--r-- | src/sbefw/sbeHostUtils.C | 95 | ||||
| -rwxr-xr-x | src/test/testcases/testGeneric.xml | 6 | ||||
| -rw-r--r-- | src/test/testcases/testHostFFDC.py | 162 | ||||
| -rw-r--r-- | src/test/testcases/testUtil.py | 27 |
4 files changed, 281 insertions, 9 deletions
diff --git a/src/sbefw/sbeHostUtils.C b/src/sbefw/sbeHostUtils.C index 310bf9dc..7cf14f9b 100644 --- a/src/sbefw/sbeHostUtils.C +++ b/src/sbefw/sbeHostUtils.C @@ -38,7 +38,10 @@ #include "assert.h" #include "fapi2.H" #include "sbeglobals.H" - +#include "sbeMemAccessInterface.H" +#include "sbeFFDC.H" +#include "hwp_error_info.H" +#include "sberegaccess.H" /////////////////////////////////////////////////////////////////// // PSU->SBE register access utilities @@ -199,6 +202,7 @@ void sbePSUSendResponse(sbeSbe2PsuRespHdr_t &i_sbe2PsuRespHdr, uint32_t &io_rc) { #define SBE_FUNC "sbePSUSendResponse" + SBE_ENTER(SBE_FUNC); do { // Making sure the PSU access utility is functional @@ -206,11 +210,96 @@ void sbePSUSendResponse(sbeSbe2PsuRespHdr_t &i_sbe2PsuRespHdr, { break; } - // TODO via RTC:151555 Generate FFDC - if(i_fapiRc != fapi2::FAPI2_RC_SUCCESS) + + uint32_t l_allocatedSize = SBE_GLOBAL->hostFFDCAddr.size; + bool l_is_lastAccess = false; + // Default EX Target Init..Not changing it for the time being + fapi2::Target<fapi2::TARGET_TYPE_EX> l_ex( + fapi2::plat_getTargetHandleByChipletNumber<fapi2::TARGET_TYPE_EX>( + sbeMemAccessInterface::PBA_DEFAULT_EX_CHIPLET_ID)); + p9_PBA_oper_flag l_myPbaFlag; + + sbeMemAccessInterface l_PBAInterface( + SBE_MEM_ACCESS_PBA, + SBE_GLOBAL->hostFFDCAddr.addr, + &l_myPbaFlag, + SBE_MEM_ACCESS_WRITE, + sbeMemAccessInterface::PBA_GRAN_SIZE_BYTES, + l_ex); + + bool l_internal_ffdc_present = ((i_sbe2PsuRespHdr.primStatus != + SBE_PRI_OPERATION_SUCCESSFUL) || + (i_sbe2PsuRespHdr.secStatus != + SBE_SEC_OPERATION_SUCCESSFUL)); + + // If no ffdc , exit; + sbeResponseFfdc_t l_ffdc; + l_ffdc.setRc(i_fapiRc); + if(l_ffdc.getRc() != fapi2::FAPI2_RC_SUCCESS) { i_sbe2PsuRespHdr.setStatus(SBE_PRI_GENERIC_EXECUTION_FAILURE, SBE_SEC_GENERIC_FAILURE_IN_EXECUTION); + l_internal_ffdc_present = true; + + SBE_ERROR( SBE_FUNC" FAPI RC:0x%08X", l_ffdc.getRc()); + SBE_INFO(SBE_FUNC" FFDC memory - addr[0x%08X%08X] size[%d]bytes", + static_cast<uint32_t>(SBE::higher32BWord(SBE_GLOBAL->hostFFDCAddr.addr)), + static_cast<uint32_t>(SBE::lower32BWord(SBE_GLOBAL->hostFFDCAddr.addr)), + SBE_GLOBAL->hostFFDCAddr.size); + uint32_t ffdcDataLenInWords = fapi2::g_FfdcData.ffdcLength + / sizeof(uint32_t); + // Set failed command information + l_ffdc.setCmdInfo(i_sbe2PsuRespHdr.seqID, + i_sbe2PsuRespHdr.cmdClass, + i_sbe2PsuRespHdr.command); + // Add HWP specific ffdc data length + l_ffdc.lenInWords += ffdcDataLenInWords; + + uint32_t len = sizeof(sbeResponseFfdc_t); + MEM_AVAILABLE_CHECK(l_allocatedSize, len, l_is_lastAccess); + fapi2::ReturnCode l_fapiRc = l_PBAInterface.accessWithBuffer( + &l_ffdc, + len, + l_is_lastAccess); + if(l_fapiRc != fapi2::FAPI2_RC_SUCCESS) + { + io_rc = SBE_SEC_GENERIC_FAILURE_IN_EXECUTION; + break; + } + MEM_AVAILABLE_CHECK(l_allocatedSize, + ffdcDataLenInWords, + l_is_lastAccess); + l_is_lastAccess = l_is_lastAccess || + !l_internal_ffdc_present || + !SbeRegAccess::theSbeRegAccess().isSendInternalFFDCSet(); + l_fapiRc = l_PBAInterface.accessWithBuffer( + &fapi2::g_FfdcData.ffdcData, + ffdcDataLenInWords, + l_is_lastAccess); + if(l_fapiRc != fapi2::FAPI2_RC_SUCCESS) + { + io_rc = SBE_SEC_GENERIC_FAILURE_IN_EXECUTION; + break; + } + } + + // Send SBE internal ffdc if there is enough memory allocated + if(l_internal_ffdc_present) + { + SBE_ERROR( SBE_FUNC" primaryStatus:0x%08X secondaryStatus:0x%08X", + (uint32_t)i_sbe2PsuRespHdr.primStatus, + (uint32_t)i_sbe2PsuRespHdr.secStatus); + // SBE internal FFDC package + SbeFFDCPackage sbeFfdc; + //Generate all the fields of FFDC package + io_rc = sbeFfdc.sendOverHostIntf(i_sbe2PsuRespHdr, + SBE_FFDC_ALL_DUMP, + &l_PBAInterface, + l_allocatedSize); + if (io_rc) + { + break; + } } // Send the response header diff --git a/src/test/testcases/testGeneric.xml b/src/test/testcases/testGeneric.xml index 7609f707..dad7a81b 100755 --- a/src/test/testcases/testGeneric.xml +++ b/src/test/testcases/testGeneric.xml @@ -5,7 +5,7 @@ <!-- --> <!-- OpenPOWER sbe Project --> <!-- --> -<!-- Contributors Listed Below - COPYRIGHT 2016 --> +<!-- Contributors Listed Below - COPYRIGHT 2016,2017 --> <!-- [+] International Business Machines Corp. --> <!-- --> <!-- --> @@ -33,3 +33,7 @@ <simcmd>run-python-file targets/p9_nimbus/sbeTest/testSbeDump.py</simcmd> <exitonerror>yes</exitonerror> </testcase> + <testcase> + <simcmd>run-python-file targets/p9_nimbus/sbeTest/testHostFFDC.py</simcmd> + <exitonerror>yes</exitonerror> + </testcase> diff --git a/src/test/testcases/testHostFFDC.py b/src/test/testcases/testHostFFDC.py new file mode 100644 index 00000000..60c61e24 --- /dev/null +++ b/src/test/testcases/testHostFFDC.py @@ -0,0 +1,162 @@ +# IBM_PROLOG_BEGIN_TAG +# This is an automatically generated prolog. +# +# $Source: src/test/testcases/testHostFFDC.py $ +# +# OpenPOWER sbe Project +# +# Contributors Listed Below - COPYRIGHT 2017 +# [+] International Business Machines Corp. +# +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or +# implied. See the License for the specific language governing +# permissions and limitations under the License. +# +# IBM_PROLOG_END_TAG + +import sys +sys.path.append("targets/p9_nimbus/sbeTest" ) +import testPSUUtil +import testRegistry as reg +import testUtil +import testMemUtil + +#------------------------------- +# This is a Test Expected Data +#------------------------------- +''' +This data are the values or strings that needs to be validated for the test. +''' +''' +#------------------------------------------------------------------------------------------------------------------------------ +# SBE side test data - +#------------------------------------------------------------------------------------------------------------------------------ +''' +sbe_test_data = ( + #----------------------------------------------------------------------------------------------------- + # OP Reg ValueToWrite size Test Expected Data Description + #----------------------------------------------------------------------------------------------------- + # Set FFDC chip-op + ["write", reg.REG_MBOX0, "0000010000F0D704", 8, "None", "Writing to MBOX0 address"], + # FFDC Size, Pass CMD Size + ["write", reg.REG_MBOX1, "0000200000000100", 8, "None", "Writing to MBOX1 address"], + # FFDC Addr + ["write", reg.REG_MBOX2, "0000000008000000", 8, "None", "Writing to MBOX2 address"], + # Pass Cmd Addr + ["write", reg.REG_MBOX3, "0000000008000000", 8, "None", "Writing to MBOX3 address"], + ["write", reg.PSU_SBE_DOORBELL_REG_WO_OR, "8000000000000000", 8, "None", "Update SBE Doorbell register to interrupt SBE"], + ) +''' +#--------------------- +# Host side test data - SUCCESS +#--------------------- +''' +host_test_data_success = ( + #---------------------------------------------------------------------------------------------------------------- + # OP Reg ValueToWrite size Test Expected Data Description + #---------------------------------------------------------------------------------------------------------------- + ["read", reg.REG_MBOX4, "0", 8, "0000000000F0D704", "Reading Host MBOX4 data to Validate"], + ) + +''' +#----------------------------------------------------------------------- +# Do not modify - Used to simulate interrupt on Ringing Doorbell on Host +#----------------------------------------------------------------------- +''' +host_polling_data = ( + #---------------------------------------------------------------------------------------------------------------- + # OP Reg ValueToWrite size Test Expected Data Description + #---------------------------------------------------------------------------------------------------------------- + ["read", reg.PSU_HOST_DOORBELL_REG_WO_OR, "0", 8, "8000000000000000", "Reading Host Doorbell for Interrupt Bit0"], + ) + +host_pass_through_polling_data = ( + #---------------------------------------------------------------------------------------------------------------- + # OP Reg ValueToWrite size Test Expected Data Description + #---------------------------------------------------------------------------------------------------------------- + ["read", reg.PSU_HOST_DOORBELL_REG_WO_OR, "0", 8, "0800000000000000", "Reading Host Doorbell for Interrupt Bit4"], + ) + +''' +#------------------------------------------------------------------------------------------------------------------------------ +# SBE side test data - Target - Pervasive(Core), Chiplet Id - 32, Ring ID - ec_func(224), mode - 0x0020(RING_MODE_HEADER_CHECK) +#------------------------------------------------------------------------------------------------------------------------------ +''' +sbe_test_invalid_ring = ( + #----------------------------------------------------------------------------------------------------- + # OP Reg ValueToWrite size Test Expected Data Description + #----------------------------------------------------------------------------------------------------- + ["write", reg.REG_MBOX0, "0000010000F0D301", 8, "None", "Writing to MBOX0 address"], + ["write", reg.REG_MBOX1, "0002002000FF0020", 8, "None", "Writing to MBOX1 address"], + ["write", reg.PSU_SBE_DOORBELL_REG_WO_OR, "8000000000000000", 8, "None", "Update SBE Doorbell register to interrupt SBE"], + ) +host_test_data_failure = ( + #---------------------------------------------------------------------------------------------------------------- + # OP Reg ValueToWrite size Test Expected Data Description + #---------------------------------------------------------------------------------------------------------------- + ["read", reg.REG_MBOX4, "0", 8, "00FE000A00F0D301", "Reading Host MBOX4 data to Validate"], + ) + +#------------------------- +# Main Function +#------------------------- +def main(): + # Run Simics initially + testUtil.runCycles( 10000000 ); + + # Intialize the class obj instances + regObj = testPSUUtil.registry() # Registry obj def for operation + + print "\n Execute SBE Test - Set FFDC Address\n" + + # HOST->SBE data set execution + regObj.ExecuteTestOp( testPSUUtil.simSbeObj, sbe_test_data ) + + print "\n Poll on Host side for INTR ...\n" + #Poll on HOST DoorBell Register for interrupt + regObj.pollingOn( testPSUUtil.simSbeObj, host_polling_data, 5 ) + + #SBE->HOST data set execution + regObj.ExecuteTestOp( testPSUUtil.simSbeObj, host_test_data_success ) + + testUtil.runCycles( 10000000 ) + + # Invalid ring - 248 + # HOST->SBE data set execution + regObj.ExecuteTestOp( testPSUUtil.simSbeObj, sbe_test_invalid_ring ) + + print "\n Poll on Host side for INTR ...\n" + #Poll on HOST DoorBell Register for interrupt + regObj.pollingOn( testPSUUtil.simSbeObj, host_polling_data, 5 ) + + #SBE->HOST data set execution + regObj.ExecuteTestOp( testPSUUtil.simSbeObj, host_test_data_failure ) + + #dump ffdc to a file + readData = testMemUtil.getmem(0x08000000, 0x2000, 0x02) + hostDumpFile = open("hostDumpFFDC.bin", 'wb') + hostDumpFile.write(bytearray(readData)) + hostDumpFile.close() + + # extract HWP ffdc + readData = testUtil.extractHWPFFDC(True, readData) + +if __name__ == "__main__": + main() + if err: + print ( "\nTest Suite completed with error(s)" ) + #sys.exit(1) + else: + print ( "\nTest Suite completed with no errors" ) + #sys.exit(0); + + diff --git a/src/test/testcases/testUtil.py b/src/test/testcases/testUtil.py index 5fd46307..3e78bd50 100644 --- a/src/test/testcases/testUtil.py +++ b/src/test/testcases/testUtil.py @@ -150,9 +150,13 @@ def readEntry(obj, address, size): return value -def extractHWPFFDC(dumpToFile = False): +def extractHWPFFDC(dumpToFile = False, readData = None): '''Header extraction''' - data = readDsEntryReturnVal() + if(readData != None): + data = readData[:4] + readData = readData[4:] + else: + data = readDsEntryReturnVal() magicBytes = ((data[0] << 8) | data[1]) if (magicBytes == 0xFFDC) : print ("\nMagic Bytes Match") @@ -161,13 +165,21 @@ def extractHWPFFDC(dumpToFile = False): packLen = ((data[2] << 8) | data[3]) print ("\nFFDC package length = " + str(packLen)) # extract Sequence ID, Command class and command - data = readDsEntryReturnVal() + if(readData != None): + data = readData[:4] + readData = readData[4:] + else: + data = readDsEntryReturnVal() seqId = ((data[0] << 24) | (data[1] << 16)) cmdClass = data[2] cmd = data[3] print ("\n SeqId ["+str(seqId)+"] CmdClass ["+str(cmdClass)+"] Cmd ["+str(cmd)+"]") - data = readDsEntryReturnVal() + if(readData != None): + data = readData[:4] + readData = readData[4:] + else: + data = readDsEntryReturnVal() fapiRc = ((data[0] << 24) | (data[1] << 16) | (data[2] << 8) | data[3]) print ("\nFAPI rc = " + str(hex(fapiRc))) @@ -175,12 +187,17 @@ def extractHWPFFDC(dumpToFile = False): myBin = open('hwp_ffdc.bin', 'wb') print ("\nwriting "+'hwp_ffdc.bin') for i in range(0, packLen-3): - data = readDsEntryReturnVal() + if(readData != None): + data = readData[:4] + readData = readData[4:] + else: + data = readDsEntryReturnVal() if(dumpToFile): myBin.write(bytearray(data)) if(dumpToFile): print("write to a file Done") myBin.close() + return readData def read(obj, address, size): """ Read from memory space """ |
