diff options
3 files changed, 105 insertions, 2 deletions
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml index 93a6af9e..1373bc75 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml @@ -1870,6 +1870,24 @@ </attribute> <!-- ******************************************************************** --> <attribute> + <id>ATTR_CHIP_EC_FEATURE_HW424691</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description> + Cumulus DD1.0: enable workarounds for HW424691 in FBC initfile + Set alink token inits via scan for dd1.0 to avoid serial scom conflict + </description> + <chipEcFeature> + <chip> + <name>ENUM_ATTR_NAME_CUMULUS</name> + <ec> + <value>0x10</value> + <test>LESS_THAN_OR_EQUAL</test> + </ec> + </chip> + </chipEcFeature> + </attribute> + <!-- ******************************************************************** --> + <attribute> <id>ATTR_CHIP_EC_FEATURE_HW409019</id> <targetType>TARGET_TYPE_PROC_CHIP</targetType> <description> @@ -5556,4 +5574,22 @@ </chipEcFeature> </attribute> <!-- ******************************************************************** --> + <attribute> + <id>ATTR_CHIP_EC_FEATURE_HW419022</id>> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description> + Cumulus DD1: Use alternate training sequence to establish + OBUS fabric DL layer to avoid HW419022 + </description> + <chipEcFeature> + <chip> + <name>ENUM_ATTR_NAME_CUMULUS</name> + <ec> + <value>0x10</value> + <test>EQUAL</test> + </ec> + </chip> + </chipEcFeature> + </attribute> + <!-- ******************************************************************** --> </attributes> diff --git a/src/import/chips/p9/procedures/xml/attribute_info/nest_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/nest_attributes.xml index 850cb305..cce29eb4 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/nest_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/nest_attributes.xml @@ -475,6 +475,38 @@ </attribute> <!-- ********************************************************************** --> <attribute> + <id>ATTR_PROC_FABRIC_LINK_ACTIVE</id> + <targetType>TARGET_TYPE_XBUS,TARGET_TYPE_OBUS</targetType> + <description> + Indicates if the endpoint target is actively being used as a fabric link + </description> + <valueType>uint8</valueType> + <enum> + FALSE = 0x0, + TRUE = 0x1 + </enum> + <writeable/> + <initToZero/> +</attribute> +<!-- ********************************************************************** --> +<attribute> + <id>ATTR_LINK_TRAIN</id> + <targetType>TARGET_TYPE_XBUS,TARGET_TYPE_OBUS</targetType> + <description> + Indicates which sublinks should be initialized/trained + </description> + <valueType>uint8</valueType> + <enum> + BOTH = 0x0, + EVEN_ONLY = 0x1, + ODD_ONLY = 0x2 + </enum> + <writeable/> + <initToZero/> + <platInit/> +</attribute> +<!-- ********************************************************************** --> +<attribute> <id>ATTR_PROC_FABRIC_X_ATTACHED_CHIP_CNFG</id> <targetType>TARGET_TYPE_PROC_CHIP</targetType> <description> @@ -485,13 +517,26 @@ <array>7</array> <enum> FALSE = 0x0, - TRUE = 0x1 + TRUE = 0x1, + EVEN_ONLY = 0x2, + ODD_ONLY = 0x3 </enum> <writeable/> <initToZero/> </attribute> <!-- ********************************************************************** --> <attribute> + <id>ATTR_PROC_FABRIC_X_LINKS_CNFG</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description> + Contains the total number of active X links on this chip + </description> + <valueType>uint8</valueType> + <writeable/> + <initToZero/> +</attribute> +<!-- ********************************************************************** --> +<attribute> <id>ATTR_PROC_FABRIC_A_ATTACHED_CHIP_CNFG</id> <targetType>TARGET_TYPE_PROC_CHIP</targetType> <description> @@ -502,13 +547,26 @@ <array>4</array> <enum> FALSE = 0x0, - TRUE = 0x1 + TRUE = 0x1, + EVEN_ONLY = 0x2, + ODD_ONLY = 0x3 </enum> <writeable/> <initToZero/> </attribute> <!-- ********************************************************************** --> <attribute> + <id>ATTR_PROC_FABRIC_A_LINKS_CNFG</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description> + Contains the total number of active A links on this chip + </description> + <valueType>uint8</valueType> + <writeable/> + <initToZero/> +</attribute> +<!-- ********************************************************************** --> +<attribute> <id>ATTR_PROC_FABRIC_X_ATTACHED_CHIP_ID</id> <targetType>TARGET_TYPE_PROC_CHIP</targetType> <description> diff --git a/src/import/chips/p9/procedures/xml/attribute_info/pervasive_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/pervasive_attributes.xml index 2a8e04d1..d58e393e 100755 --- a/src/import/chips/p9/procedures/xml/attribute_info/pervasive_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/pervasive_attributes.xml @@ -29,6 +29,15 @@ <attributes> <attribute> + <id>ATTR_PROC_NPU_REGION_ENABLED</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description>Boolean indicating accessibilty of NPU logic region</description> + <valueType>uint8</valueType> + <writeable/> + <initToZero/> +</attribute> + +<attribute> <id>ATTR_CLOCK_PLL_MUX</id> <targetType>TARGET_TYPE_PROC_CHIP</targetType> <description>setup clock mux settings</description> |
