diff options
9 files changed, 197 insertions, 176 deletions
diff --git a/src/hwpf/plat_ring_traverse.C b/src/hwpf/plat_ring_traverse.C index 6fc31309..c8a3a6a1 100644 --- a/src/hwpf/plat_ring_traverse.C +++ b/src/hwpf/plat_ring_traverse.C @@ -38,6 +38,7 @@ const uint32_t RISK_LEVEL_ZERO = 0; #define CACHE_CONTAINED_MODE_OFFSET_IN_TOR 1 #define RISK_LEVEL_MODE_OFFSET_IN_TOR 2 #define OVERRIDE_VARIANT_SIZE 1 +#define INSTANCE_VARIANT_SIZE 1 // TOR v7 specific /// /// @brief This is a plat pecific (SBE Plat) function that locates the @@ -340,9 +341,9 @@ fapi2::ReturnCode getRS4ImageFromTor( case EQ_TYPE: // EQ - Quad 0 - Quad 5 l_chipletData = EQ::g_chipletData; - if (l_torVersion < 6) + if (l_torVersion < 7) { - l_numVarAdjust = 1; + l_numVarAdjust = 3; } l_sectionOffset = l_sectionTOR->TOC_EQ_COMMON_RING; @@ -358,9 +359,9 @@ fapi2::ReturnCode getRS4ImageFromTor( case EC_TYPE: // EC - Core 0 - 23 l_chipletData = EC::g_chipletData; - if (l_torVersion < 6) + if (l_torVersion < 7) { - l_numVarAdjust = 1; + l_numVarAdjust = 3; } l_sectionOffset = l_sectionTOR->TOC_EC_COMMON_RING; @@ -385,9 +386,23 @@ fapi2::ReturnCode getRS4ImageFromTor( { break; } - - l_cpltRingVariantSz = i_applyOverride ? OVERRIDE_VARIANT_SIZE : - (l_chipletData.iv_num_ring_variants - l_numVarAdjust); + + // If TOR v7 image, adjust variant size according to Common vs Instance ring type + // since there is only BASE variant support for Instance (repr) rings in v7 + if (l_torVersion < 7) + { + l_cpltRingVariantSz = (l_chipletData.iv_num_common_ring_variants - l_numVarAdjust); + } + else + { + l_cpltRingVariantSz = (l_ringType == INSTANCE_RING) ? + INSTANCE_VARIANT_SIZE : + (l_chipletData.iv_num_common_ring_variants - l_numVarAdjust); + } + + // Subsequently, re-adjust variant size according to whether override or flush ring + // (Note, no TOR version dependency here.) + l_cpltRingVariantSz = i_applyOverride ? OVERRIDE_VARIANT_SIZE : l_cpltRingVariantSz; FAPI_INF("l_sectionOffset %08x", l_sectionOffset); // Determine the section TOR address for the ring diff --git a/src/import/chips/centaur/utils/imageProcs/cen_ringId.C b/src/import/chips/centaur/utils/imageProcs/cen_ringId.C index a00c0587..24daa76b 100644 --- a/src/import/chips/centaur/utils/imageProcs/cen_ringId.C +++ b/src/import/chips/centaur/utils/imageProcs/cen_ringId.C @@ -145,7 +145,7 @@ const GenRingIdList RING_ID_LIST_COMMON[] = {"tp_pll_bndy_bucket_8", 0x6a, 0x01, 0x01, CEN_RING, 0x01030088}, }; -const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT }; +const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT }; }; // namespace CEN @@ -165,7 +165,7 @@ void CEN_RID::ringid_get_chiplet_properties( GenRingIdList** o_ringComm, GenRingIdList** o_ringInst, RingVariantOrder** o_varOrder, - uint8_t* o_varNumb) + uint8_t* o_numVariants) { switch (i_chipletType) { @@ -174,7 +174,7 @@ void CEN_RID::ringid_get_chiplet_properties( *o_ringComm = (GenRingIdList*) CEN::RING_ID_LIST_COMMON; *o_ringInst = NULL; *o_varOrder = (RingVariantOrder*) CEN::RING_VARIANT_ORDER; - *o_varNumb = (*(*o_cpltData)).iv_num_ring_variants; + *o_numVariants = (*(*o_cpltData)).iv_num_common_ring_variants; break; default : @@ -182,7 +182,7 @@ void CEN_RID::ringid_get_chiplet_properties( *o_ringComm = NULL; *o_ringInst = NULL; *o_varOrder = NULL; - *o_varNumb = 0; + *o_numVariants = 0; break; } } @@ -192,12 +192,12 @@ GenRingIdList* CEN_RID::_ringid_get_ring_list(RingId_t i_ringId) ChipletData_t* l_cpltData; GenRingIdList* l_ringList[2]; // 0: common, 1: instance RingVariantOrder* l_varOrder; - uint8_t l_varNumb; + uint8_t l_numVariants;; int i, j, n; CEN_RID::ringid_get_chiplet_properties( CEN_RID::ringid_get_chiplet(i_ringId), - &l_cpltData, &l_ringList[0], &l_ringList[1], &l_varOrder, &l_varNumb); + &l_cpltData, &l_ringList[0], &l_ringList[1], &l_varOrder, &l_numVariants); if (!l_ringList[0]) { diff --git a/src/import/chips/centaur/utils/imageProcs/cen_ringId.H b/src/import/chips/centaur/utils/imageProcs/cen_ringId.H index 8b8f524e..a3811d88 100644 --- a/src/import/chips/centaur/utils/imageProcs/cen_ringId.H +++ b/src/import/chips/centaur/utils/imageProcs/cen_ringId.H @@ -411,7 +411,7 @@ ringid_get_chiplet_properties( GenRingIdList** o_ringComm, GenRingIdList** o_ringInst, RingVariantOrder** o_varOrder, - uint8_t* o_varNumb); + uint8_t* o_numVariants); // returns properties of a ring as determined by ringId GenRingIdList* diff --git a/src/import/chips/common/utils/imageProcs/common_ringId.C b/src/import/chips/common/utils/imageProcs/common_ringId.C index b4ee2c2a..28f2003b 100644 --- a/src/import/chips/common/utils/imageProcs/common_ringId.C +++ b/src/import/chips/common/utils/imageProcs/common_ringId.C @@ -45,81 +45,81 @@ const char* ringVariantName[] = { "BASE", "CC", "RL", "RL2", + "RL3", + "RL4", + "RL5" }; #ifndef __HOSTBOOT_MODULE // This is only used by ring_apply in EKB -static int get_ipl_base_param( char*& l_ringPath ) +static int get_ipl_ring_path_param( RingVariant_t i_ringVariant, char*& o_ringPath) { - l_ringPath = getenv("IPL_BASE"); - - if (l_ringPath == NULL) + switch (i_ringVariant) { - MY_ERR("p9_ring_apply.C: ring path: IPL_BASE environment parameter not set.\n"); - return INFRASTRUCT_RC_ENV_ERROR; - } + case RV_BASE: + o_ringPath = getenv("IPL_BASE"); + break; - return INFRASTRUCT_RC_SUCCESS; -} + case RV_CC: + o_ringPath = getenv("IPL_CACHE_CONTAINED"); + break; -static int get_ipl_cache_contained_param( char*& l_ringPath) -{ - l_ringPath = getenv("IPL_CACHE_CONTAINED"); + case RV_RL: + o_ringPath = getenv("IPL_RISK"); + break; - if (l_ringPath == NULL) - { - MY_ERR("p9_ring_apply.C: ring path: IPL_CACHE_CONTAINED environment parameter not set.\n"); - return INFRASTRUCT_RC_ENV_ERROR; + default: + o_ringPath = NULL; + break; } - return INFRASTRUCT_RC_SUCCESS; -} - -static int get_ipl_risk_param( char*& l_ringPath) -{ - l_ringPath = getenv("IPL_RISK"); - - if (l_ringPath == NULL) + if (o_ringPath == NULL) { - MY_ERR("p9_ring_apply.C: ring path: IPL_RISK environment parameter not set.\n"); + MY_ERR("get_ipl_ring_path_param(): IPL env parm for ringVariant=0x%x not set.\n", + i_ringVariant); return INFRASTRUCT_RC_ENV_ERROR; } return INFRASTRUCT_RC_SUCCESS; } -static int get_runtime_base_param( char*& l_ringPath) +static int get_runtime_ring_path_param( RingVariant_t i_ringVariant, char*& o_ringPath) { - l_ringPath = getenv("RUNTIME_BASE"); - - if (l_ringPath == NULL) + switch (i_ringVariant) { - MY_ERR("p9_ring_apply.C: ring path: RUNTIME_BASE environment parameter not set.\n"); - return INFRASTRUCT_RC_ENV_ERROR; - } + case RV_BASE: + o_ringPath = getenv("RUNTIME_BASE"); + break; - return INFRASTRUCT_RC_SUCCESS; -} -static int get_runtime_risk_param( char*& l_ringPath) -{ - l_ringPath = getenv("RUNTIME_RISK"); + case RV_RL: + o_ringPath = getenv("RUNTIME_RISK"); + break; - if (l_ringPath == NULL) - { - MY_ERR("p9_ring_apply.C: ring path: RUNTIME_RISK environment parameter not set.\n"); - return INFRASTRUCT_RC_ENV_ERROR; - } + case RV_RL2: + o_ringPath = getenv("RUNTIME_RISK2"); + break; - return INFRASTRUCT_RC_SUCCESS; -} + case RV_RL3: + o_ringPath = getenv("RUNTIME_RISK3"); + break; -static int get_runtime_risk2_param( char*& l_ringPath) -{ - l_ringPath = getenv("RUNTIME_RISK2"); + case RV_RL4: + o_ringPath = getenv("RUNTIME_RISK4"); + break; + + case RV_RL5: + o_ringPath = getenv("RUNTIME_RISK5"); + break; + + default: + o_ringPath = NULL; + break; + } - if (l_ringPath == NULL) + if (o_ringPath == NULL) { - MY_ERR("p9_ring_apply.C: ring path: RUNTIME_RISK2 environment parameter not set.\n"); + MY_ERR("get_runtime_ring_path_param(): RUNTIME env parm for ringVariant=0x%x not set.\n", + i_ringVariant); return INFRASTRUCT_RC_ENV_ERROR; } @@ -138,23 +138,19 @@ int ringid_get_raw_ring_file_path( uint32_t i_magic, if ( i_magic == TOR_MAGIC_SBE ) { - if ( i_ringVariant == RV_BASE ) + if ( i_ringVariant == RV_BASE || + i_ringVariant == RV_CC || + i_ringVariant == RV_RL ) { - rc = get_ipl_base_param(l_ringDir); + rc = get_ipl_ring_path_param(i_ringVariant, l_ringDir); } - else if ( i_ringVariant == RV_CC ) - { - rc = get_ipl_cache_contained_param(l_ringDir); - } - else if ( i_ringVariant == RV_RL ) + else if ( i_ringVariant == RV_RL2 || + i_ringVariant == RV_RL3 || + i_ringVariant == RV_RL4 || + i_ringVariant == RV_RL5 ) { - rc = get_ipl_risk_param(l_ringDir); - } - else if ( i_ringVariant == RV_RL2 ) - { - // Valid RV for Quad chiplets but there's just no RL2 rings for SBE phase (by convention). + // No IPL rings for these variants rc = TOR_NO_RINGS_FOR_VARIANT; - break; } else { @@ -174,23 +170,19 @@ int ringid_get_raw_ring_file_path( uint32_t i_magic, else if ( i_magic == TOR_MAGIC_CME || i_magic == TOR_MAGIC_SGPE ) { - if ( i_ringVariant == RV_BASE ) + if ( i_ringVariant == RV_BASE || + i_ringVariant == RV_RL || + i_ringVariant == RV_RL2 || + i_ringVariant == RV_RL3 || + i_ringVariant == RV_RL4 || + i_ringVariant == RV_RL5 ) { - rc = get_runtime_base_param(l_ringDir); + rc = get_runtime_ring_path_param(i_ringVariant, l_ringDir); } else if ( i_ringVariant == RV_CC ) { - // Valid RV for Quad chiplets but there's just no CC rings for runtime phases (by convention). + // No Runtime rings for this variant rc = TOR_NO_RINGS_FOR_VARIANT; - break; - } - else if ( i_ringVariant == RV_RL ) - { - rc = get_runtime_risk_param(l_ringDir); - } - else if ( i_ringVariant == RV_RL2 ) - { - rc = get_runtime_risk2_param(l_ringDir); } else { @@ -209,13 +201,10 @@ int ringid_get_raw_ring_file_path( uint32_t i_magic, } else if ( i_magic == TOR_MAGIC_CEN ) { - if ( i_ringVariant == RV_BASE ) - { - rc = get_ipl_base_param(l_ringDir); - } - else if ( i_ringVariant == RV_RL ) + if ( i_ringVariant == RV_BASE || + i_ringVariant == RV_RL ) { - rc = get_ipl_risk_param(l_ringDir); + rc = get_ipl_ring_path_param(i_ringVariant, l_ringDir); } else { @@ -389,12 +378,12 @@ int ringid_get_properties( ChipType_t i_chipType, o_ringIdListCommon, o_ringIdListInstance, o_ringVariantOrder, - o_numVariants ); + o_numVariants); - if ( i_torVersion < 6 && + if ( i_torVersion < 7 && (i_chipletType == P9_RID::EQ_TYPE || i_chipletType == P9_RID::EC_TYPE) ) { - *o_numVariants = *o_numVariants - 1; + *o_numVariants = *o_numVariants - 3; } if ( i_torMagic == TOR_MAGIC_OVRD || @@ -409,11 +398,11 @@ int ringid_get_properties( ChipType_t i_chipType, *o_ringIdListCommon = (GenRingIdList*)P9_RID::EC::RING_ID_LIST_COMMON; *o_ringIdListInstance = (GenRingIdList*)P9_RID::EC::RING_ID_LIST_INSTANCE; *o_ringVariantOrder = (RingVariantOrder*)P9_RID::EC::RING_VARIANT_ORDER; - *o_numVariants = P9_RID::EC::g_chipletData.iv_num_ring_variants; + *o_numVariants = P9_RID::EC::g_chipletData.iv_num_common_ring_variants; - if (i_torVersion < 6) + if (i_torVersion < 7) { - *o_numVariants = *o_numVariants - 1; + *o_numVariants = *o_numVariants - 3; } } else if ( i_torMagic == TOR_MAGIC_SGPE ) @@ -422,11 +411,11 @@ int ringid_get_properties( ChipType_t i_chipType, *o_ringIdListCommon = (GenRingIdList*)P9_RID::EQ::RING_ID_LIST_COMMON; *o_ringIdListInstance = (GenRingIdList*)P9_RID::EQ::RING_ID_LIST_INSTANCE; *o_ringVariantOrder = (RingVariantOrder*)P9_RID::EQ::RING_VARIANT_ORDER; - *o_numVariants = P9_RID::EQ::g_chipletData.iv_num_ring_variants; + *o_numVariants = P9_RID::EQ::g_chipletData.iv_num_common_ring_variants; - if (i_torVersion < 6) + if (i_torVersion < 7) { - *o_numVariants = *o_numVariants - 1; + *o_numVariants = *o_numVariants - 3; } } else @@ -449,7 +438,7 @@ int ringid_get_properties( ChipType_t i_chipType, o_ringIdListCommon, o_ringIdListInstance, o_ringVariantOrder, - o_numVariants ); + o_numVariants); if ( i_torMagic == TOR_MAGIC_OVRD) { diff --git a/src/import/chips/common/utils/imageProcs/common_ringId.H b/src/import/chips/common/utils/imageProcs/common_ringId.H index bcf6dc24..a0ba7c12 100644 --- a/src/import/chips/common/utils/imageProcs/common_ringId.H +++ b/src/import/chips/common/utils/imageProcs/common_ringId.H @@ -83,7 +83,7 @@ typedef uint8_t myBoolean_t; // false:0, true:1, undefined:UNDEFINED_BOOL typedef struct { uint32_t magic; // =TOR_MAGIC_xyz - uint8_t version; // =TOR_VERSION + uint8_t version; // =TOR version ChipType_t chipType; // Value from ChipType enum uint8_t ddLevel; // Actual DD level of ringSection uint8_t undefined; @@ -121,7 +121,8 @@ typedef uint16_t TorRingOffset_t; // Offset value to actual ring //#define TOR_VERSION 3 // Added TOR magic header. //#define TOR_VERSION 4 // TOR API code restructuring. //#define TOR_VERSION 5 // Removed TOR-level DD handling. -#define TOR_VERSION 6 // Added additional runtime risk level (RL2) +//#define TOR_VERSION 6 // Added additional runtime risk level (RL2) +#define TOR_VERSION 7 // Added three more runtime risk levels (RL3/4/5) // TOR Magic values for top-level TOR ringSection and sub-ringSections enum TorMagicNum @@ -196,7 +197,7 @@ typedef struct uint32_t scanScomAddress; } GenRingIdList; -// P9 PPE types supported. +// PPE types supported. // - This enum also reflects the order with which they appear in the HW image's .rings section. // - Do NOT make changes to the values or order of this enum. enum PpeType @@ -207,28 +208,32 @@ enum PpeType NUM_PPE_TYPES = 0x03 }; -// P9 ring variants supported. +// Ring variants supported. // - This enum also reflects the order with which they appear in various images' .rings section. // - Do NOT make changes to the values or order of this enum. enum RingVariant { RV_BASE = 0x00, RV_CC = 0x01, - RV_RL = 0x02, - RV_RL2 = 0x03, - NUM_RING_VARIANTS = 0x04, + RV_RL = 0x02, // Kernel and user protection + RV_RL2 = 0x03, // Kernel only protection + RV_RL3 = 0x04, // Rugby v4 + RV_RL4 = 0x05, // Java performance + RV_RL5 = 0x06, // Spare + NUM_RING_VARIANTS = 0x07, }; extern const char* ppeTypeName[]; extern const char* ringVariantName[]; +// Variant order for Common rings typedef struct { - RingVariant_t variant[4]; + RingVariant_t variant[NUM_RING_VARIANTS]; } RingVariantOrder; -// P9 ring types supported. +// Ring types supported. // - This enum also reflects the order with which they appear in various images' .rings section. // - Do NOT make changes to the values or order of this enum. enum RingType @@ -247,21 +252,21 @@ enum RingBlockType typedef struct { - // This is the chiplet-ID of the first instance of the Chiplet + // Chiplet ID of the first instance of the Chiplet uint8_t iv_base_chiplet_number; - // The no.of common rings for the Chiplet + // Number of common rings for the Chiplet uint8_t iv_num_common_rings; - // The no.of instance rings for the Chiplet (w/different ringId values) + // Number of instance rings for the Chiplet (w/different ringId values) uint8_t iv_num_instance_rings; - // The no.of instance rings for the Chiplet (w/different ringId values + // Number of instance rings for the Chiplet (w/different ringId values // AND different scanAddress values) uint8_t iv_num_instance_rings_scan_addrs; - // The no.of ring variants - uint8_t iv_num_ring_variants; + // Number of variants for common rings (instance rings only have BASE variant) + uint8_t iv_num_common_ring_variants; } ChipletData_t; // This is used to Set (Mark) the left-most bit @@ -351,7 +356,7 @@ int ringid_get_properties( ChipType_t i_chipType, GenRingIdList** o_ringIdListInstance, RingVariantOrder** o_ringVariantOrder, RingProperties_t** o_ringProps, - uint8_t* o_numVariants ); + uint8_t* o_numVariants); #endif // _COMMON_RINGID_H_ diff --git a/src/import/chips/p9/procedures/xml/attribute_info/pervasive_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/pervasive_attributes.xml index 51cb1e66..9486f295 100755 --- a/src/import/chips/p9/procedures/xml/attribute_info/pervasive_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/pervasive_attributes.xml @@ -210,7 +210,7 @@ <description>HWP/Init "risk level" enabled. Used by HB to pass to HB driven HWPs</description> <valueType>uint8</valueType> - <enum>RL0 = 0x0,RL1 = 0x1,RL2 = 0x2</enum> + <enum>RL0 = 0x0,RL1 = 0x1,RL2 = 0x2,RL3 = 0x3,RL4 = 0x4, RL5 = 0x5</enum> <persistRuntime/> <platInit/> </attribute> diff --git a/src/import/chips/p9/utils/imageProcs/p9_ringId.C b/src/import/chips/p9/utils/imageProcs/p9_ringId.C index ee8cd602..855a5c7e 100644 --- a/src/import/chips/p9/utils/imageProcs/p9_ringId.C +++ b/src/import/chips/p9/utils/imageProcs/p9_ringId.C @@ -61,7 +61,7 @@ const GenRingIdList RING_ID_LIST_INSTANCE[] = {"perv_repr" , 0x13, 0x01, 0x01, VPD_RING , 0x01034006}, {"occ_repr" , 0x14, 0x01, 0x01, VPD_RING , 0x01030806}, }; -const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT }; +const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT }; }; @@ -85,7 +85,7 @@ const GenRingIdList RING_ID_LIST_INSTANCE[] = {"n0_nx_repr" , 0x0a, 0x02, 0x02, VPD_RING , 0x02032006}, {"n0_cxa0_repr" , 0x0b, 0x02, 0x02, VPD_RING , 0x02031006}, }; -const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT}; +const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT }; }; @@ -113,7 +113,7 @@ const GenRingIdList RING_ID_LIST_INSTANCE[] = {"n1_ioo1_repr" , 0x0e, 0x03, 0x03, VPD_RING , 0x03030406}, {"n1_mcs23_repr" , 0x0f, 0x03, 0x03, VPD_RING , 0x03030206}, }; -const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT}; +const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT }; }; @@ -137,7 +137,7 @@ const GenRingIdList RING_ID_LIST_INSTANCE[] = {"n2_cxa1_repr" , 0x0a, 0x04, 0x04, VPD_RING , 0x04032006}, {"n2_psi_repr" , 0x0b, 0x04, 0x04, VPD_RING , 0x04030206}, }; -const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT }; +const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT }; }; @@ -162,7 +162,7 @@ const GenRingIdList RING_ID_LIST_INSTANCE[] = {"n3_mcs01_repr" , 0x0b, 0x05, 0x05, VPD_RING , 0x05030106}, {"n3_np_repr" , 0x0c, 0x05, 0x05, VPD_RING , 0x05030806}, }; -const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT }; +const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT }; }; @@ -193,7 +193,7 @@ const GenRingIdList RING_ID_LIST_INSTANCE[] = {"xb_io1_repr" , 0x15, 0x06, 0x06, VPD_RING , 0x06031106}, {"xb_io2_repr" , 0x16, 0x06, 0x06, VPD_RING , 0x06030886}, }; -const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT }; +const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT }; }; @@ -224,7 +224,7 @@ const GenRingIdList RING_ID_LIST_INSTANCE[] = {"mc_iom01_repr" , 0x11, 0x07, 0x08, VPD_RING , 0x07031006}, {"mc_iom23_repr" , 0x12, 0x07, 0x08, VPD_RING , 0x07030806}, }; -const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT }; +const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT }; }; @@ -244,7 +244,7 @@ const GenRingIdList RING_ID_LIST_INSTANCE[] = { {"ob0_repr" , 0x07, 0x09, 0x09, VPD_RING , 0x09037006}, }; -const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT }; +const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT }; }; @@ -264,7 +264,7 @@ const GenRingIdList RING_ID_LIST_INSTANCE[] = { {"ob1_repr" , 0x07, 0x0a, 0x0a, VPD_RING , 0x0A037006}, }; -const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT }; +const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT }; }; @@ -284,7 +284,7 @@ const GenRingIdList RING_ID_LIST_INSTANCE[] = { {"ob2_repr" , 0x07, 0x0b, 0x0b, VPD_RING , 0x0B037006}, }; -const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT }; +const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT }; }; @@ -304,7 +304,7 @@ const GenRingIdList RING_ID_LIST_INSTANCE[] = { {"ob3_repr" , 0x07, 0x0c, 0x0c, VPD_RING , 0x0C037006}, }; -const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT }; +const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT }; }; @@ -322,7 +322,7 @@ const GenRingIdList RING_ID_LIST_INSTANCE[] = { {"pci0_repr" , 0x05, 0x0d, 0x0d, VPD_RING , 0x0D037006}, }; -const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT }; +const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT }; }; @@ -340,7 +340,7 @@ const GenRingIdList RING_ID_LIST_INSTANCE[] = { {"pci1_repr" , 0x05, 0x0e, 0x0e, VPD_RING , 0x0E037806}, }; -const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT }; +const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT }; }; @@ -358,7 +358,7 @@ const GenRingIdList RING_ID_LIST_INSTANCE[] = { {"pci2_repr" , 0x05, 0x0F, 0x0F, VPD_RING , 0x0F037C06}, }; -const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT }; +const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT }; }; @@ -441,7 +441,7 @@ const GenRingIdList RING_ID_LIST_INSTANCE[] = {"ex_l3_refr_repr" , 0x45, 0x10, 0x1b, VPD_RING , 0x10030046}, {"ex_l3_refr_time" , 0x46, 0x10, 0x1b, VPD_RING , 0x10030047}, }; -const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_CC, RV_RL, RV_RL2 }; +const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_CC, RV_RL, RV_RL2, RV_RL3, RV_RL4, RV_RL5 }; }; @@ -460,7 +460,7 @@ const GenRingIdList RING_ID_LIST_INSTANCE[] = { { "ec_repr" , 0x05, 0x20, 0x37, VPD_RING , 0x20037006}, }; -const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_CC, RV_RL, RV_RL2 }; +const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_CC, RV_RL, RV_RL2, RV_RL3, RV_RL4, RV_RL5 }; }; @@ -480,7 +480,7 @@ void P9_RID::ringid_get_chiplet_properties( GenRingIdList** o_ringComm, GenRingIdList** o_ringInst, RingVariantOrder** o_varOrder, - uint8_t* o_varNumb) + uint8_t* o_numVariants) { switch (i_chipletType) { @@ -489,7 +489,7 @@ void P9_RID::ringid_get_chiplet_properties( *o_ringComm = (GenRingIdList*) PERV::RING_ID_LIST_COMMON; *o_ringInst = (GenRingIdList*) PERV::RING_ID_LIST_INSTANCE; *o_varOrder = (RingVariantOrder*) PERV::RING_VARIANT_ORDER; - *o_varNumb = (*(*o_cpltData)).iv_num_ring_variants; + *o_numVariants = (*(*o_cpltData)).iv_num_common_ring_variants; break; case N0_TYPE : @@ -497,7 +497,7 @@ void P9_RID::ringid_get_chiplet_properties( *o_ringComm = (GenRingIdList*) N0::RING_ID_LIST_COMMON; *o_ringInst = (GenRingIdList*) N0::RING_ID_LIST_INSTANCE; *o_varOrder = (RingVariantOrder*) N0::RING_VARIANT_ORDER; - *o_varNumb = (*(*o_cpltData)).iv_num_ring_variants; + *o_numVariants = (*(*o_cpltData)).iv_num_common_ring_variants; break; case N1_TYPE : @@ -505,7 +505,7 @@ void P9_RID::ringid_get_chiplet_properties( *o_ringComm = (GenRingIdList*) N1::RING_ID_LIST_COMMON; *o_ringInst = (GenRingIdList*) N1::RING_ID_LIST_INSTANCE; *o_varOrder = (RingVariantOrder*) N1::RING_VARIANT_ORDER; - *o_varNumb = (*(*o_cpltData)).iv_num_ring_variants; + *o_numVariants = (*(*o_cpltData)).iv_num_common_ring_variants; break; case N2_TYPE : @@ -513,7 +513,7 @@ void P9_RID::ringid_get_chiplet_properties( *o_ringComm = (GenRingIdList*) N2::RING_ID_LIST_COMMON; *o_ringInst = (GenRingIdList*) N2::RING_ID_LIST_INSTANCE; *o_varOrder = (RingVariantOrder*) N2::RING_VARIANT_ORDER; - *o_varNumb = (*(*o_cpltData)).iv_num_ring_variants; + *o_numVariants = (*(*o_cpltData)).iv_num_common_ring_variants; break; case N3_TYPE : @@ -521,7 +521,7 @@ void P9_RID::ringid_get_chiplet_properties( *o_ringComm = (GenRingIdList*) N3::RING_ID_LIST_COMMON; *o_ringInst = (GenRingIdList*) N3::RING_ID_LIST_INSTANCE; *o_varOrder = (RingVariantOrder*) N3::RING_VARIANT_ORDER; - *o_varNumb = (*(*o_cpltData)).iv_num_ring_variants; + *o_numVariants = (*(*o_cpltData)).iv_num_common_ring_variants; break; case XB_TYPE : @@ -529,7 +529,7 @@ void P9_RID::ringid_get_chiplet_properties( *o_ringComm = (GenRingIdList*) XB::RING_ID_LIST_COMMON; *o_ringInst = (GenRingIdList*) XB::RING_ID_LIST_INSTANCE; *o_varOrder = (RingVariantOrder*) XB::RING_VARIANT_ORDER; - *o_varNumb = (*(*o_cpltData)).iv_num_ring_variants; + *o_numVariants = (*(*o_cpltData)).iv_num_common_ring_variants; break; case MC_TYPE : @@ -537,7 +537,7 @@ void P9_RID::ringid_get_chiplet_properties( *o_ringComm = (GenRingIdList*) MC::RING_ID_LIST_COMMON; *o_ringInst = (GenRingIdList*) MC::RING_ID_LIST_INSTANCE; *o_varOrder = (RingVariantOrder*) MC::RING_VARIANT_ORDER; - *o_varNumb = (*(*o_cpltData)).iv_num_ring_variants; + *o_numVariants = (*(*o_cpltData)).iv_num_common_ring_variants; break; case OB0_TYPE : @@ -545,7 +545,7 @@ void P9_RID::ringid_get_chiplet_properties( *o_ringComm = (GenRingIdList*) OB0::RING_ID_LIST_COMMON; *o_ringInst = (GenRingIdList*) OB0::RING_ID_LIST_INSTANCE; *o_varOrder = (RingVariantOrder*) OB0::RING_VARIANT_ORDER; - *o_varNumb = (*(*o_cpltData)).iv_num_ring_variants; + *o_numVariants = (*(*o_cpltData)).iv_num_common_ring_variants; break; case OB1_TYPE : @@ -553,7 +553,7 @@ void P9_RID::ringid_get_chiplet_properties( *o_ringComm = (GenRingIdList*) OB1::RING_ID_LIST_COMMON; *o_ringInst = (GenRingIdList*) OB1::RING_ID_LIST_INSTANCE; *o_varOrder = (RingVariantOrder*) OB1::RING_VARIANT_ORDER; - *o_varNumb = (*(*o_cpltData)).iv_num_ring_variants; + *o_numVariants = (*(*o_cpltData)).iv_num_common_ring_variants; break; case OB2_TYPE : @@ -561,7 +561,7 @@ void P9_RID::ringid_get_chiplet_properties( *o_ringComm = (GenRingIdList*) OB2::RING_ID_LIST_COMMON; *o_ringInst = (GenRingIdList*) OB2::RING_ID_LIST_INSTANCE; *o_varOrder = (RingVariantOrder*) OB2::RING_VARIANT_ORDER; - *o_varNumb = (*(*o_cpltData)).iv_num_ring_variants; + *o_numVariants = (*(*o_cpltData)).iv_num_common_ring_variants; break; case OB3_TYPE : @@ -569,7 +569,7 @@ void P9_RID::ringid_get_chiplet_properties( *o_ringComm = (GenRingIdList*) OB3::RING_ID_LIST_COMMON; *o_ringInst = (GenRingIdList*) OB3::RING_ID_LIST_INSTANCE; *o_varOrder = (RingVariantOrder*) OB3::RING_VARIANT_ORDER; - *o_varNumb = (*(*o_cpltData)).iv_num_ring_variants; + *o_numVariants = (*(*o_cpltData)).iv_num_common_ring_variants; break; case PCI0_TYPE : @@ -577,7 +577,7 @@ void P9_RID::ringid_get_chiplet_properties( *o_ringComm = (GenRingIdList*) PCI0::RING_ID_LIST_COMMON; *o_ringInst = (GenRingIdList*) PCI0::RING_ID_LIST_INSTANCE; *o_varOrder = (RingVariantOrder*) PCI0::RING_VARIANT_ORDER; - *o_varNumb = (*(*o_cpltData)).iv_num_ring_variants; + *o_numVariants = (*(*o_cpltData)).iv_num_common_ring_variants; break; case PCI1_TYPE : @@ -585,7 +585,7 @@ void P9_RID::ringid_get_chiplet_properties( *o_ringComm = (GenRingIdList*) PCI1::RING_ID_LIST_COMMON; *o_ringInst = (GenRingIdList*) PCI1::RING_ID_LIST_INSTANCE; *o_varOrder = (RingVariantOrder*) PCI1::RING_VARIANT_ORDER; - *o_varNumb = (*(*o_cpltData)).iv_num_ring_variants; + *o_numVariants = (*(*o_cpltData)).iv_num_common_ring_variants; break; case PCI2_TYPE : @@ -593,7 +593,7 @@ void P9_RID::ringid_get_chiplet_properties( *o_ringComm = (GenRingIdList*) PCI2::RING_ID_LIST_COMMON; *o_ringInst = (GenRingIdList*) PCI2::RING_ID_LIST_INSTANCE; *o_varOrder = (RingVariantOrder*) PCI2::RING_VARIANT_ORDER; - *o_varNumb = (*(*o_cpltData)).iv_num_ring_variants; + *o_numVariants = (*(*o_cpltData)).iv_num_common_ring_variants; break; case EQ_TYPE : @@ -601,7 +601,7 @@ void P9_RID::ringid_get_chiplet_properties( *o_ringComm = (GenRingIdList*) EQ::RING_ID_LIST_COMMON; *o_ringInst = (GenRingIdList*) EQ::RING_ID_LIST_INSTANCE; *o_varOrder = (RingVariantOrder*) EQ::RING_VARIANT_ORDER; - *o_varNumb = (*(*o_cpltData)).iv_num_ring_variants; + *o_numVariants = (*(*o_cpltData)).iv_num_common_ring_variants; break; case EC_TYPE : @@ -609,7 +609,7 @@ void P9_RID::ringid_get_chiplet_properties( *o_ringComm = (GenRingIdList*) EC::RING_ID_LIST_COMMON; *o_ringInst = (GenRingIdList*) EC::RING_ID_LIST_INSTANCE; *o_varOrder = (RingVariantOrder*) EC::RING_VARIANT_ORDER; - *o_varNumb = (*(*o_cpltData)).iv_num_ring_variants; + *o_numVariants = (*(*o_cpltData)).iv_num_common_ring_variants; break; default : @@ -617,7 +617,7 @@ void P9_RID::ringid_get_chiplet_properties( *o_ringComm = NULL; *o_ringInst = NULL; *o_varOrder = NULL; - *o_varNumb = 0; + *o_numVariants = 0; break; } } @@ -627,12 +627,12 @@ GenRingIdList* P9_RID::_ringid_get_ring_list(RingId_t i_ringId) ChipletData_t* l_cpltData; GenRingIdList* l_ringList[2]; // 0: common, 1: instance RingVariantOrder* l_varOrder; - uint8_t l_varNumb; + uint8_t l_numVariants; int i, j, n; P9_RID::ringid_get_chiplet_properties( P9_RID::ringid_get_chiplet(i_ringId), - &l_cpltData, &l_ringList[0], &l_ringList[1], &l_varOrder, &l_varNumb); + &l_cpltData, &l_ringList[0], &l_ringList[1], &l_varOrder, &l_numVariants); if (!l_ringList[0]) { diff --git a/src/import/chips/p9/utils/imageProcs/p9_ringId.H b/src/import/chips/p9/utils/imageProcs/p9_ringId.H index e5fb6b71..fd4a4289 100644 --- a/src/import/chips/p9/utils/imageProcs/p9_ringId.H +++ b/src/import/chips/p9/utils/imageProcs/p9_ringId.H @@ -214,7 +214,7 @@ static const ChipletData_t g_chipletData = 19, // 19 common rings for pervasive chiplet 2, // 2 instance specific rings for pervasive chiplet 2, - 2, // 2 ring variants: BASE, RL + 2, // 2 common ring variants: BASE, RL }; }; // end of namespace PERV @@ -244,7 +244,7 @@ static const ChipletData_t g_chipletData = 9, // 9 common rings for N0 Chiplet 3, // 3 instance specific rings for N0 chiplet 3, - 2, // 2 ring variants: BASE, RL + 2, // 2 common ring variants: BASE, RL }; }; @@ -278,7 +278,7 @@ static const ChipletData_t g_chipletData = 12, // 12 common rings for N1 Chiplet 4, // 4 instance specific rings for N1 chiplet 4, - 2, // 2 ring variants: BASE, RL + 2, // 2 common ring variants: BASE, RL }; }; @@ -308,7 +308,7 @@ static const ChipletData_t g_chipletData = 9, // 9 common rings for N2 Chiplet 3, // 3 instance specific rings for N2 chiplet 3, - 2, // 2 ring variants: BASE, RL + 2, // 2 common ring variants: BASE, RL }; }; @@ -339,7 +339,7 @@ static const ChipletData_t g_chipletData = 10,// 10 common rings for N3 Chiplet 3, // 3 instance specific rings for N3 chiplet 3, - 2, // 2 ring variants: BASE, RL + 2, // 2 common ring variants: BASE, RL }; }; @@ -376,7 +376,7 @@ static const ChipletData_t g_chipletData = 15, // 15 common rings for X-Bus Chiplet 4, // 4 instance specific rings for XB chiplet 4, - 2, // 2 ring variants: BASE, RL + 2, // 2 common ring variants: BASE, RL }; }; // end of namespace XB @@ -414,7 +414,7 @@ static const ChipletData_t g_chipletData = 16, // 16 common rings for MC Chiplet 3, // 3 instance specific rings for each MC instance 3, - 2, // 2 ring variants: BASE, RL + 2, // 2 common ring variants: BASE, RL }; }; // end of namespace MC @@ -441,7 +441,7 @@ static const ChipletData_t g_chipletData = 7, // 7 common rings for OB Chiplet 1, // 1 instance specific rings for each OB chiplet 1, - 2, // 2 ring variants: BASE, RL + 2, // 2 common ring variants: BASE, RL }; }; // end of namespace OB0 @@ -468,7 +468,7 @@ static const ChipletData_t g_chipletData = 7, // 7 common rings for OB Chiplet 1, // 1 instance specific rings for each OB chiplet 1, - 2, // 2 ring variants: BASE, RL + 2, // 2 common ring variants: BASE, RL }; }; // end of namespace OB1 @@ -496,7 +496,7 @@ static const ChipletData_t g_chipletData = 7, // 7 common rings for OB Chiplet 1, // 1 instance specific rings for each OB chiplet 1, - 2, // 2 ring variants: BASE, RL + 2, // 2 common ring variants: BASE, RL }; }; // end of namespace OB2 @@ -523,7 +523,7 @@ static const ChipletData_t g_chipletData = 7, // 7 common rings for OB Chiplet 1, // 1 instance specific rings for each OB chiplet 1, - 2, // 2 ring variants: BASE, RL + 2, // 2 common ring variants: BASE, RL }; }; // end of namespace OB2 @@ -547,7 +547,7 @@ static const ChipletData_t g_chipletData = 5, // 5 common rings for PCI0 chiplet 1, // 1 instance specific rings for PCI0 chiplet 1, - 2, // 2 ring variants: BASE, RL + 2, // 2 common ring variants: BASE, RL }; }; @@ -571,7 +571,7 @@ static const ChipletData_t g_chipletData = 5, // 5 common rings for PCI1 chiplet 1, // 1 instance specific rings for PCI1 chiplet 1, - 2, // 2 ring variants: BASE, RL + 2, // 2 common ring variants: BASE, RL }; }; @@ -595,7 +595,7 @@ static const ChipletData_t g_chipletData = 5, // 5 common rings for PCI2 chiplet 1, // 1 instance specific rings for PCI2 chiplet 1, - 2, // 2 ring variants: BASE, RL + 2, // 2 common ring variants: BASE, RL }; }; @@ -686,7 +686,7 @@ static const ChipletData_t g_chipletData = 66, // 66 common rings for Quad chiplet. 5, // 5 instance specific rings for each EQ chiplet 9, // 9 different rings since 2 per EX ring and 1 per EQ - 4, // 4 ring variants: BASE, CC, RL, RL2 + 7, // 7 common ring variants: BASE, CC, RL, RL2/3/4/5 }; }; // end of namespace EQ @@ -711,7 +711,7 @@ static const ChipletData_t g_chipletData = 6, // 6 common rings for Core chiplet 1, // 1 instance specific ring for each Core chiplet 1, - 4, // 4 ring variants: BASE, CC, RL, RL2 + 7, // 7 common ring variants: BASE, CC, RL, RL2/3/4/5 }; }; // end of namespace EC @@ -1257,7 +1257,7 @@ ringid_get_chiplet_properties( GenRingIdList** o_ringComm, GenRingIdList** o_ringInst, RingVariantOrder** o_varOrder, - uint8_t* o_varNumb); + uint8_t* o_numVariants); // Returns properties of a ring as determined by ringId GenRingIdList* diff --git a/src/import/chips/p9/utils/imageProcs/p9_tor.C b/src/import/chips/p9/utils/imageProcs/p9_tor.C index 855f0753..7164a2a6 100644 --- a/src/import/chips/p9/utils/imageProcs/p9_tor.C +++ b/src/import/chips/p9/utils/imageProcs/p9_tor.C @@ -54,6 +54,7 @@ int get_ring_from_ring_section( void* i_ringSection, // Ring secti uint8_t iInst, iRing, iVariant; TorHeader_t* torHeader; uint32_t torMagic; + uint8_t torVersion; uint8_t chipType; TorCpltBlock_t* cpltBlock; TorCpltOffset_t cpltOffset; // Offset from ringSection to chiplet section @@ -73,6 +74,7 @@ int get_ring_from_ring_section( void* i_ringSection, // Ring secti torHeader = (TorHeader_t*)i_ringSection; torMagic = be32toh(torHeader->magic); + torVersion = torHeader->version; chipType = torHeader->chipType; rc = ringid_get_noof_chiplets( chipType, @@ -115,6 +117,16 @@ int get_ring_from_ring_section( void* i_ringSection, // Ring secti numRings = bInstCase ? cpltData->iv_num_instance_rings : cpltData->iv_num_common_rings; ringIdList = bInstCase ? ringIdListInstance : ringIdListCommon; + // Adjust number of variants according to TOR version of image + if (torVersion < 7) + { + // Nothing to do. Number of variants is the same for Common and Instance rings. + } + else + { + numVariants = bInstCase ? 1 : numVariants; // Only BASE variant for Instance rings + } + if (ringIdList) // Only proceed if chiplet has [Common/Instance] rings. { // Calc offset to chiplet's CMN or INST section, cpltOffset (steps 1-3) @@ -142,8 +154,8 @@ int get_ring_from_ring_section( void* i_ringSection, // Ring secti if ( strcmp( (ringIdList + iRing)->ringName, ringProps[i_ringId].iv_name ) == 0 && ( i_ringVariant == ringVariantOrder->variant[iVariant] || - numVariants == 1 ) && // If no variants, ignore Variant - ( !bInstCase || ( bInstCase && iInst == io_instanceId) ) ) + numVariants == 1 ) && // If no variants, ignore i_ringVariant and assume "BASE" ring + ( !bInstCase || ( bInstCase && iInst == io_instanceId ) ) ) { strcpy(o_ringName, (ringIdList + iRing)->ringName); |
