diff options
| -rw-r--r-- | src/import/generic/procedures/xml/error_info/generic_error.xml | 64 |
1 files changed, 64 insertions, 0 deletions
diff --git a/src/import/generic/procedures/xml/error_info/generic_error.xml b/src/import/generic/procedures/xml/error_info/generic_error.xml new file mode 100644 index 00000000..cf6b61af --- /dev/null +++ b/src/import/generic/procedures/xml/error_info/generic_error.xml @@ -0,0 +1,64 @@ +<!-- IBM_PROLOG_BEGIN_TAG --> +<!-- This is an automatically generated prolog. --> +<!-- --> +<!-- $Source: src/import/generic/procedures/xml/error_info/generic_error.xml $ --> +<!-- --> +<!-- OpenPOWER sbe Project --> +<!-- --> +<!-- Contributors Listed Below - COPYRIGHT 2018,2019 --> +<!-- [+] International Business Machines Corp. --> +<!-- --> +<!-- --> +<!-- Licensed under the Apache License, Version 2.0 (the "License"); --> +<!-- you may not use this file except in compliance with the License. --> +<!-- You may obtain a copy of the License at --> +<!-- --> +<!-- http://www.apache.org/licenses/LICENSE-2.0 --> +<!-- --> +<!-- Unless required by applicable law or agreed to in writing, software --> +<!-- distributed under the License is distributed on an "AS IS" BASIS, --> +<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or --> +<!-- implied. See the License for the specific language governing --> +<!-- permissions and limitations under the License. --> +<!-- --> +<!-- IBM_PROLOG_END_TAG --> + +<!-- --> +<!-- @file generic_error.xml --> +<!-- @brief Error xml for generic code --> +<!-- --> + +<!-- *HWP HWP Owner: Andre Marin <aamarin@us.ibm.com> --> +<!-- *HWP HWP Backup: Stephen Glancy <sglancy@us.ibm.com> --> +<!-- *HWP Team: Memory --> +<!-- *HWP Level: 3 --> +<!-- *HWP Consumed by: HB:FSP --> +<!-- --> + +<hwpErrors> + +<hwpError> + <rc>RC_MSS_INVALID_FREQUENCY</rc> + <description> + An invalid frequency was passed to frequency to clock period + </description> + <ffdc>FREQ</ffdc> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> +</hwpError> + +<hwpError> + <rc>RC_MSS_INVALID_CLOCK_PERIOD</rc> + <description> + An invalid clock period was passed to clock period to frequency + </description> + <ffdc>CLOCK_PERIOD</ffdc> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> +</hwpError> + +</hwpErrors> |
