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| author | Alvin Wang <wangat@tw.ibm.com> | 2019-01-29 02:13:09 -0600 |
|---|---|---|
| committer | Raja Das <rajadas2@in.ibm.com> | 2019-07-26 00:54:16 -0500 |
| commit | d48d771bcf633bbdfe77bf7cc7c61968e870ecd7 (patch) | |
| tree | 3c87633522a65044c0206e45ae570434d9028f94 /src | |
| parent | caacd24f8b88e0510d0e200162542006a80f554c (diff) | |
| download | talos-sbe-d48d771bcf633bbdfe77bf7cc7c61968e870ecd7.tar.gz talos-sbe-d48d771bcf633bbdfe77bf7cc7c61968e870ecd7.zip | |
Reinstates exp_draminit_mc with change_addr_mux_sel fix
Change-Id: I410caeac98273f8e460677945e356631d530a220
Original-Change-Id: Ief62fadce588bf65e249ae771bd03ab31ed4bddf
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71201
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Dev-Ready: Louis Stermole <stermole@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/shared/exp_consts.H | 5 | ||||
| -rw-r--r-- | src/import/generic/memory/lib/utils/shared/mss_generic_consts.H | 39 |
2 files changed, 44 insertions, 0 deletions
diff --git a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/shared/exp_consts.H b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/shared/exp_consts.H index 55729254..559c01d7 100644 --- a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/shared/exp_consts.H +++ b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/shared/exp_consts.H @@ -36,8 +36,13 @@ #ifndef EXP_CONSTS_H #define EXP_CONSTS_H +#include <generic/memory/lib/utils/shared/mss_generic_consts.H> + namespace mss { + +constexpr mss::mc_type DEFAULT_MC_TYPE = mss::mc_type::EXPLORER; + namespace exp { diff --git a/src/import/generic/memory/lib/utils/shared/mss_generic_consts.H b/src/import/generic/memory/lib/utils/shared/mss_generic_consts.H index be433029..457b4bf1 100644 --- a/src/import/generic/memory/lib/utils/shared/mss_generic_consts.H +++ b/src/import/generic/memory/lib/utils/shared/mss_generic_consts.H @@ -83,6 +83,7 @@ enum conversions enum generic_sizes { NUM_MAX_FREQS = 5, ///< Used for ATTR_MAX_ALLOWED_DIMM_FREQ + MARK_STORE_COUNT = 8, ///< Elements in a VPD mark/store array }; /// @@ -189,6 +190,30 @@ enum ddr_dimm_speeds DDR5_MAX_SPEED = 4800, }; +enum states +{ + LOW = 0, + HIGH = 1, + START = 1, + STOP = 0, + START_N = 0, + STOP_N = 1, + ON = 1, + OFF = 0, + ON_N = 0, + OFF_N = 1, + YES = 1, + NO = 0, + YES_N = 0, + NO_N = 1, + // Uses "_" in the name for INVALID as INVALID is defined as a macro in the + // FSP code. If we just use INVALID as an enum name, then the preprocessor + // compile phase changes it to be the macro. + _INVALID_ = 0xFF, + NO_CHIP_SELECT_ACTIVE = 0xFF, +}; + + namespace spd { @@ -309,6 +334,20 @@ struct procTraits<proc_type::NIMBUS> }; }; +/// +/// @brief Trait classes for proc_type - AXONE specialization +/// +/// TODO: Need to add mc_type +template< > +struct procTraits<proc_type::AXONE> +{ + enum + { + EXP_PORTS_PER_OCMB = 1, + }; +}; + + }// mss #endif |
