Update p9_sbe_load_bootloader Hwp to receive the addr-key stash-2

Change-Id: Id27b43085d1619bc9cfbe854dc46eac6ee85e170
RTC:166124
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35883
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35889
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>

4 files changed, 50 insertions, 1 deletions

diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_sbe_hb_structures.H b/src/import/chips/p9/procedures/hwp/nest/p9_sbe_hb_structures.H
index 3380044a..2a4ca38c 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_sbe_hb_structures.H
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_sbe_hb_structures.H
@@ -40,6 +40,16 @@
 //------------------------------------------------------------------------------
 // Structure definitions
 //------------------------------------------------------------------------------
+// Max Pairs
+#define MAX_ROW_COUNT 8
+
+// To keep all the Stashed Keys & Addrs together within this struct
+typedef struct __attribute__((packed))
+{
+    uint8_t  key[MAX_ROW_COUNT];
+    uint64_t addr[MAX_ROW_COUNT];
+}
+keyAddrPair_t;
 
 // Used for version checking as the BootloaderConfigData_t structure changes
 enum SbeBootloaderVersion
@@ -49,6 +59,7 @@ enum SbeBootloaderVersion
     // Later versions use format [release:2][version:2]
     SAB_ADDED = 0x00090002,
     MMIO_BARS_ADDED = 0x00090003,
+    ADDR_STASH_SUPPORT_ADDED = 0x00090004,
 };
 
 union BootloaderSecureSettings
@@ -83,6 +94,7 @@ struct BootloaderConfigData_t
     uint8_t reserved[7];      // bytes 21:27 Reserved space to maintain 64-bit alignment
     uint64_t xscomBAR;        // bytes 28:35 XSCOM MMIO BAR
     uint64_t lpcBAR;          // bytes 36:43 LPC MMIO BAR
+    keyAddrPair_t pair;       // total of 72 Bytes (8+8*8) for Key/Addr Pair
 }; // Note: Want to use '__attribute__((packed))' but compiler won't let us
 
 #endif // _SBE_HB_STRUCTURES_H_
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_sbe_load_bootloader.C b/src/import/chips/p9/procedures/hwp/nest/p9_sbe_load_bootloader.C
index 4e0afc86..715030ae 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_sbe_load_bootloader.C
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_sbe_load_bootloader.C
@@ -389,6 +389,10 @@ get_bootloader_config_data(
     uint64_t l_chip_base_address_m;
     uint64_t l_chip_base_address_mmio;
     uint64_t l_index = 0;
+    // Variable to fetch the Key-Addr Stash Pair
+    uint64_t l_stashAddrAttr = 0;
+    uint8_t* l_stashDataPtr = NULL;
+
     fapi2::buffer<uint64_t> l_cbs_cs;
     BootloaderConfigData_t l_bootloader_config_data;
 
@@ -403,7 +407,7 @@ get_bootloader_config_data(
              l_chip_base_address_mmio),
              "Error from p9_fbc_utils_get_chip_base_address (chip)");
 
-    l_bootloader_config_data.version = MMIO_BARS_ADDED;
+    l_bootloader_config_data.version = ADDR_STASH_SUPPORT_ADDED;
 
     // XSCOM BAR offset
     FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PROC_XSCOM_BAR_BASE_ADDR_OFFSET,
@@ -468,6 +472,24 @@ get_bootloader_config_data(
     PACK_8B(io_data, l_index, l_bootloader_config_data.xscomBAR);
     PACK_8B(io_data, l_index, l_bootloader_config_data.lpcBAR);
 
+    // Fetch the address for the stash storage
+    FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_SBE_ADDR_KEY_STASH_ADDR,
+                           FAPI_SYSTEM,
+                           l_stashAddrAttr),
+             "fapiGetAttribute of ATTR_SBE_ADDR_KEY_STASH_ADDR failed!");
+
+    if(l_stashAddrAttr) // If not 0, use this as addr to point to the data
+    {
+        l_stashDataPtr = reinterpret_cast<uint8_t*>(l_stashAddrAttr);
+
+        for(uint8_t l_idx = 0; l_idx < sizeof(keyAddrPair_t); l_idx++)
+        {
+            // Total of 72Bytes will be stashed, First 8Bytes are the keys
+            // Next 8 x 8Bytes are the addresses
+            PACK_1B(io_data, l_index, l_stashDataPtr[l_idx]);
+        }
+    }
+
 fapi_try_exit:
     FAPI_DBG("End");
     return fapi2::current_err;
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml
index 91a03632..89f7c727 100644
--- a/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml
+++ b/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml
@@ -523,4 +523,8 @@ attribute tank
         <name>ATTR_CHIP_EC_FEATURE_USE_XIVE_HW_RESET</name>
         <virtual/>
   </entry>
+  <entry>
+           <name>ATTR_SBE_ADDR_KEY_STASH_ADDR</name>
+           <value>0x0000000000000000</value>
+  </entry>
 </entries>
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_load_bootloader_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_load_bootloader_attributes.xml
index 3fd1c8ce..a69a44f8 100644
--- a/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_load_bootloader_attributes.xml
+++ b/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_load_bootloader_attributes.xml
@@ -99,4 +99,15 @@
   <platInit/>
   <initToZero/>
 </attribute>
+<attribute>
+  <id>ATTR_SBE_ADDR_KEY_STASH_ADDR</id>
+  <targetType>TARGET_TYPE_SYSTEM</targetType>
+  <description>Instruction for HB Boatloader to pick the Add-Key Stash Pair
+    from this memory into the exception vector</description>
+  <valueType>uint64</valueType>
+  <persistRuntime/>
+  <platInit/>
+  <writeable/>
+  <initToZero/>
+</attribute>
 </attributes>