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| author | Thi Tran <thi@us.ibm.com> | 2017-02-16 11:23:04 -0600 |
|---|---|---|
| committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2017-02-24 21:01:28 -0500 |
| commit | c9cbbf827ef29da8f8dcf40f6c6557264fde32a4 (patch) | |
| tree | 24e649eec1f31988a2d423f6c7a4b9b31cf2d0d5 /src | |
| parent | 6d13b953ef43d08950d0839292537594a4a578e0 (diff) | |
| download | talos-sbe-c9cbbf827ef29da8f8dcf40f6c6557264fde32a4.tar.gz talos-sbe-c9cbbf827ef29da8f8dcf40f6c6557264fde32a4.zip | |
p9_mss_setup_bars - Setup MCFIR mask
Change-Id: Ie1642c615ba461b3ce19770cd52025aef8447d36
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36564
Reviewed-by: Marc Gollub <gollub@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: CHRISTINA L. GRAVES <clgraves@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36759
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/nest/p9_sbe_mcs_setup.C | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_sbe_mcs_setup.C b/src/import/chips/p9/procedures/hwp/nest/p9_sbe_mcs_setup.C index 66e46f4e..28aa083a 100644 --- a/src/import/chips/p9/procedures/hwp/nest/p9_sbe_mcs_setup.C +++ b/src/import/chips/p9/procedures/hwp/nest/p9_sbe_mcs_setup.C @@ -112,13 +112,14 @@ fapi2::ReturnCode set_hb_dcbz_config(const fapi2::Target<fapi2::TARGET_TYPE_MCS> FAPI_TRY(fapi2::putScom(i_target, MCS_MCMODE1, l_mcmode1), "Error from putScom (MCS_MCMODE1)"); - // Setup MC FIR + // Unmask MC FIR + + // Set MC Fault Isolation Action1 Register l_mcaction.setBit<MCS_MCFIR_MC_INTERNAL_RECOVERABLE_ERROR>(); FAPI_TRY(fapi2::putScom(i_target, MCS_MCFIRACT1, l_mcaction), "Error from putScom (MCS_MCFIRACT1)"); - // MCFIRMASK -- unmask command list/channel timeout errors (so a checkstop will - // occur if we break cache containment, but hit against the BAR) + // Clear FIR bits in MC Fault Isolation Mask Register l_mcfirmask_and.flush<1>(); l_mcfirmask_and.clearBit<MCS_MCFIR_COMMAND_LIST_TIMEOUT>(); l_mcfirmask_and.clearBit<MCS_MCFIR_MC_INTERNAL_RECOVERABLE_ERROR>(); @@ -126,7 +127,6 @@ fapi2::ReturnCode set_hb_dcbz_config(const fapi2::Target<fapi2::TARGET_TYPE_MCS> l_mcfirmask_and.clearBit<MCS_MCFIR_POWERBUS_PROTOCOL_ERROR>(); l_mcfirmask_and.clearBit<MCS_MCFIR_MULTIPLE_BAR>(); l_mcfirmask_and.clearBit<MCS_MCFIR_INVALID_ADDRESS>(); - FAPI_TRY(fapi2::putScom(i_target, MCS_MCFIRMASK_AND, l_mcfirmask_and), "Error from putScom (MCS_MCFIRMASK_AND)"); |
