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| author | Shelton Leung <sleung@us.ibm.com> | 2016-11-17 10:45:03 -0600 |
|---|---|---|
| committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2016-11-30 20:41:02 -0500 |
| commit | ad189e3f5d76f7629e6f78f993943641a263df11 (patch) | |
| tree | 77c1849357cf588ae114802995848bf1d38e342a /src | |
| parent | 3d935f6f77c62b2f78fdd36995082eeeaae06c82 (diff) | |
| download | talos-sbe-ad189e3f5d76f7629e6f78f993943641a263df11.tar.gz talos-sbe-ad189e3f5d76f7629e6f78f993943641a263df11.zip | |
scan inits for lab workaround for DI bug HW392781
Change-Id: Ia71c4d0933112c6804774b76a08ec5fbbe254833
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32780
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32822
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml index c07a25e2..91245a95 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml @@ -429,6 +429,23 @@ </chipEcFeature> </attribute> + <attribute> + <id>ATTR_CHIP_EC_FEATURE_MSS_HW392781_RDARRAY_CLKGATE</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description> + Data integrity issue requires us to disable clockgate in read array for Nimbus DD1.0 + </description> + <chipEcFeature> + <chip> + <name>ENUM_ATTR_NAME_NIMBUS</name> + <ec> + <value>0x20</value> + <test>LESS_THAN</test> + </ec> + </chip> + </chipEcFeature> + </attribute> + <!-- ******************************************************************** --> <!-- End Memory Section --> <!-- ******************************************************************** --> |
