NMMU Nimbus dd2 scom/scan updates, updated comments

Change-Id: I4b9296793fc8802f03bfebcb46446c8bc1a1d4e3
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39782
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com>
Reviewed-by: Matt K. Light <mklight@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39859
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>

3 files changed, 308 insertions, 37 deletions

diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9_mmu_scom.C b/src/import/chips/p9/procedures/hwp/initfiles/p9_mmu_scom.C
index ad70907a..404527c5 100644
--- a/src/import/chips/p9/procedures/hwp/initfiles/p9_mmu_scom.C
+++ b/src/import/chips/p9/procedures/hwp/initfiles/p9_mmu_scom.C
@@ -29,14 +29,22 @@
 
 using namespace fapi2;
 
+constexpr uint64_t literal_0 = 0;
 constexpr uint64_t literal_0x04047C0000000000 = 0x04047C0000000000;
+constexpr uint64_t literal_0x04247C0000000000 = 0x04247C0000000000;
 constexpr uint64_t literal_0x0000000000000000 = 0x0000000000000000;
 constexpr uint64_t literal_0x409B000000000000 = 0x409B000000000000;
+constexpr uint64_t literal_0x40FB000000000000 = 0x40FB000000000000;
+constexpr uint64_t literal_0x3 = 0x3;
+constexpr uint64_t literal_0x1 = 0x1;
 constexpr uint64_t literal_0x0000FAF800FF = 0x0000FAF800FF;
+constexpr uint64_t literal_0x0000FAFC00FB = 0x0000FAFC00FB;
 constexpr uint64_t literal_0x000000000000 = 0x000000000000;
 constexpr uint64_t literal_0x910000040F00 = 0x910000040F00;
+constexpr uint64_t literal_0x9D1100000F04 = 0x9D1100000F04;
 constexpr uint64_t literal_0b11111 = 0b11111;
 constexpr uint64_t literal_0x00E = 0x00E;
+constexpr uint64_t literal_0x000 = 0x000;
 constexpr uint64_t literal_0x0258 = 0x0258;
 
 fapi2::ReturnCode p9_mmu_scom(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& TGT0,
@@ -47,13 +55,27 @@ fapi2::ReturnCode p9_mmu_scom(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>&
         fapi2::ATTR_NAME_Type l_chip_id;
         FAPI_TRY(FAPI_ATTR_GET_PRIVILEGED(fapi2::ATTR_NAME, TGT0, l_chip_id));
         FAPI_TRY(FAPI_ATTR_GET_PRIVILEGED(fapi2::ATTR_EC, TGT0, l_chip_ec));
+        fapi2::ATTR_CHIP_EC_FEATURE_NMMU_DMT_DD2_Type l_TGT0_ATTR_CHIP_EC_FEATURE_NMMU_DMT_DD2;
+        FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_EC_FEATURE_NMMU_DMT_DD2, TGT0, l_TGT0_ATTR_CHIP_EC_FEATURE_NMMU_DMT_DD2));
         fapi2::ATTR_PROC_FABRIC_PUMP_MODE_Type l_TGT1_ATTR_PROC_FABRIC_PUMP_MODE;
         FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PROC_FABRIC_PUMP_MODE, TGT1, l_TGT1_ATTR_PROC_FABRIC_PUMP_MODE));
+        fapi2::ATTR_PROC_EPS_WRITE_CYCLES_T1_Type l_TGT1_ATTR_PROC_EPS_WRITE_CYCLES_T1;
+        FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PROC_EPS_WRITE_CYCLES_T1, TGT1, l_TGT1_ATTR_PROC_EPS_WRITE_CYCLES_T1));
+        fapi2::ATTR_PROC_EPS_WRITE_CYCLES_T2_Type l_TGT1_ATTR_PROC_EPS_WRITE_CYCLES_T2;
+        FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PROC_EPS_WRITE_CYCLES_T2, TGT1, l_TGT1_ATTR_PROC_EPS_WRITE_CYCLES_T2));
         fapi2::buffer<uint64_t> l_scom_buffer;
         {
             FAPI_TRY(fapi2::getScom( TGT0, 0x5012c03ull, l_scom_buffer ));
 
-            l_scom_buffer.insert<0, 22, 0, uint64_t>(literal_0x04047C0000000000 );
+            if ((l_TGT0_ATTR_CHIP_EC_FEATURE_NMMU_DMT_DD2 == literal_0))
+            {
+                l_scom_buffer.insert<0, 22, 0, uint64_t>(literal_0x04047C0000000000 );
+            }
+            else if ((l_TGT0_ATTR_CHIP_EC_FEATURE_NMMU_DMT_DD2 != literal_0))
+            {
+                l_scom_buffer.insert<0, 22, 0, uint64_t>(literal_0x04247C0000000000 );
+            }
+
             FAPI_TRY(fapi2::putScom(TGT0, 0x5012c03ull, l_scom_buffer));
         }
         {
@@ -65,15 +87,20 @@ fapi2::ReturnCode p9_mmu_scom(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>&
         {
             FAPI_TRY(fapi2::getScom( TGT0, 0x5012c07ull, l_scom_buffer ));
 
-            l_scom_buffer.insert<0, 22, 0, uint64_t>(literal_0x409B000000000000 );
+            if ((l_TGT0_ATTR_CHIP_EC_FEATURE_NMMU_DMT_DD2 == literal_0))
+            {
+                l_scom_buffer.insert<0, 22, 0, uint64_t>(literal_0x409B000000000000 );
+            }
+            else if ((l_TGT0_ATTR_CHIP_EC_FEATURE_NMMU_DMT_DD2 != literal_0))
+            {
+                l_scom_buffer.insert<0, 22, 0, uint64_t>(literal_0x40FB000000000000 );
+            }
+
             FAPI_TRY(fapi2::putScom(TGT0, 0x5012c07ull, l_scom_buffer));
         }
         {
             FAPI_TRY(fapi2::getScom( TGT0, 0x5012c15ull, l_scom_buffer ));
 
-            constexpr auto l_NMMU_MM_FBC_CQ_WRAP_NXCQ_SCOM_ADDR_BAR_MODE_OFF = 0x0;
-            l_scom_buffer.insert<33, 1, 63, uint64_t>(l_NMMU_MM_FBC_CQ_WRAP_NXCQ_SCOM_ADDR_BAR_MODE_OFF );
-
             if ((l_TGT1_ATTR_PROC_FABRIC_PUMP_MODE == fapi2::ENUM_ATTR_PROC_FABRIC_PUMP_MODE_CHIP_IS_NODE))
             {
                 constexpr auto l_NMMU_MM_FBC_CQ_WRAP_NXCQ_SCOM_CFG_PUMP_MODE_ON = 0x1;
@@ -85,12 +112,37 @@ fapi2::ReturnCode p9_mmu_scom(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>&
                 l_scom_buffer.insert<39, 1, 63, uint64_t>(l_NMMU_MM_FBC_CQ_WRAP_NXCQ_SCOM_CFG_PUMP_MODE_OFF );
             }
 
+            if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) )
+            {
+                l_scom_buffer.insert<8, 3, 61, uint64_t>(literal_0x3 );
+            }
+
             FAPI_TRY(fapi2::putScom(TGT0, 0x5012c15ull, l_scom_buffer));
         }
         {
+            if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) )
+            {
+                FAPI_TRY(fapi2::getScom( TGT0, 0x5012c1dull, l_scom_buffer ));
+
+                l_scom_buffer.insert<0, 12, 52, uint64_t>(l_TGT1_ATTR_PROC_EPS_WRITE_CYCLES_T1 );
+                l_scom_buffer.insert<16, 12, 52, uint64_t>(l_TGT1_ATTR_PROC_EPS_WRITE_CYCLES_T2 );
+                l_scom_buffer.insert<12, 4, 60, uint64_t>(literal_0x1 );
+                l_scom_buffer.insert<28, 4, 60, uint64_t>(literal_0x1 );
+                FAPI_TRY(fapi2::putScom(TGT0, 0x5012c1dull, l_scom_buffer));
+            }
+        }
+        {
             FAPI_TRY(fapi2::getScom( TGT0, 0x5012c43ull, l_scom_buffer ));
 
-            l_scom_buffer.insert<0, 48, 16, uint64_t>(literal_0x0000FAF800FF );
+            if ((l_TGT0_ATTR_CHIP_EC_FEATURE_NMMU_DMT_DD2 == literal_0))
+            {
+                l_scom_buffer.insert<0, 48, 16, uint64_t>(literal_0x0000FAF800FF );
+            }
+            else if ((l_TGT0_ATTR_CHIP_EC_FEATURE_NMMU_DMT_DD2 != literal_0))
+            {
+                l_scom_buffer.insert<0, 48, 16, uint64_t>(literal_0x0000FAFC00FB );
+            }
+
             FAPI_TRY(fapi2::putScom(TGT0, 0x5012c43ull, l_scom_buffer));
         }
         {
@@ -102,47 +154,116 @@ fapi2::ReturnCode p9_mmu_scom(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>&
         {
             FAPI_TRY(fapi2::getScom( TGT0, 0x5012c47ull, l_scom_buffer ));
 
-            l_scom_buffer.insert<0, 48, 16, uint64_t>(literal_0x910000040F00 );
+            if ((l_TGT0_ATTR_CHIP_EC_FEATURE_NMMU_DMT_DD2 == literal_0))
+            {
+                l_scom_buffer.insert<0, 48, 16, uint64_t>(literal_0x910000040F00 );
+            }
+            else if ((l_TGT0_ATTR_CHIP_EC_FEATURE_NMMU_DMT_DD2 != literal_0))
+            {
+                l_scom_buffer.insert<0, 48, 16, uint64_t>(literal_0x9D1100000F04 );
+            }
+
             FAPI_TRY(fapi2::putScom(TGT0, 0x5012c47ull, l_scom_buffer));
         }
         {
             FAPI_TRY(fapi2::getScom( TGT0, 0x5012c52ull, l_scom_buffer ));
 
+            l_scom_buffer.insert<30, 1, 59, uint64_t>(literal_0b11111 );
+            l_scom_buffer.insert<60, 4, 60, uint64_t>(literal_0b11111 );
+
             if (((l_chip_id == 0x5) && (l_chip_ec == 0x10)) )
             {
-                constexpr auto l_NMMU_MM_PIPE_THREAD_MODE_SINGLE_THREAD_MODE_ST_INV = 0x70;
-                l_scom_buffer.insert<20, 1, 57, uint64_t>(l_NMMU_MM_PIPE_THREAD_MODE_SINGLE_THREAD_MODE_ST_INV );
-                l_scom_buffer.insert<24, 1, 62, uint64_t>(l_NMMU_MM_PIPE_THREAD_MODE_SINGLE_THREAD_MODE_ST_INV );
-                l_scom_buffer.insert<26, 1, 63, uint64_t>(l_NMMU_MM_PIPE_THREAD_MODE_SINGLE_THREAD_MODE_ST_INV );
+                if ((l_TGT0_ATTR_CHIP_EC_FEATURE_NMMU_DMT_DD2 == literal_0))
+                {
+                    constexpr auto l_NMMU_MM_PIPE_THREAD_MODE_SINGLE_THREAD_MODE_ST_INV = 0x70;
+                    l_scom_buffer.insert<20, 1, 57, uint64_t>(l_NMMU_MM_PIPE_THREAD_MODE_SINGLE_THREAD_MODE_ST_INV );
+                    l_scom_buffer.insert<24, 1, 62, uint64_t>(l_NMMU_MM_PIPE_THREAD_MODE_SINGLE_THREAD_MODE_ST_INV );
+                    l_scom_buffer.insert<26, 1, 63, uint64_t>(l_NMMU_MM_PIPE_THREAD_MODE_SINGLE_THREAD_MODE_ST_INV );
+                }
+                else if ((l_TGT0_ATTR_CHIP_EC_FEATURE_NMMU_DMT_DD2 != literal_0))
+                {
+                    constexpr auto l_NMMU_MM_PIPE_THREAD_MODE_MULTI_THREAD_MODE_DYN_ST_EN_HANGP_DIS_MT_INV = 0xb;
+                    l_scom_buffer.insert<20, 1, 57, uint64_t>(l_NMMU_MM_PIPE_THREAD_MODE_MULTI_THREAD_MODE_DYN_ST_EN_HANGP_DIS_MT_INV );
+                    l_scom_buffer.insert<24, 1, 62, uint64_t>(l_NMMU_MM_PIPE_THREAD_MODE_MULTI_THREAD_MODE_DYN_ST_EN_HANGP_DIS_MT_INV );
+                    l_scom_buffer.insert<26, 1, 63, uint64_t>(l_NMMU_MM_PIPE_THREAD_MODE_MULTI_THREAD_MODE_DYN_ST_EN_HANGP_DIS_MT_INV );
+                }
             }
             else if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) )
             {
-                constexpr auto l_NMMU_MM_PIPE_THREAD_MODE_SINGLE_THREAD_MODE_ST_INV = 0xe00;
-                l_scom_buffer.insert<20, 1, 52, uint64_t>(l_NMMU_MM_PIPE_THREAD_MODE_SINGLE_THREAD_MODE_ST_INV );
-                l_scom_buffer.insert<24, 1, 57, uint64_t>(l_NMMU_MM_PIPE_THREAD_MODE_SINGLE_THREAD_MODE_ST_INV );
-                l_scom_buffer.insert<26, 1, 58, uint64_t>(l_NMMU_MM_PIPE_THREAD_MODE_SINGLE_THREAD_MODE_ST_INV );
+                if ((l_TGT0_ATTR_CHIP_EC_FEATURE_NMMU_DMT_DD2 == literal_0))
+                {
+                    constexpr auto l_NMMU_MM_PIPE_THREAD_MODE_SINGLE_THREAD_MODE_ST_INV = 0xe00;
+                    l_scom_buffer.insert<20, 1, 52, uint64_t>(l_NMMU_MM_PIPE_THREAD_MODE_SINGLE_THREAD_MODE_ST_INV );
+                    l_scom_buffer.insert<24, 1, 57, uint64_t>(l_NMMU_MM_PIPE_THREAD_MODE_SINGLE_THREAD_MODE_ST_INV );
+                    l_scom_buffer.insert<26, 1, 58, uint64_t>(l_NMMU_MM_PIPE_THREAD_MODE_SINGLE_THREAD_MODE_ST_INV );
+                }
+                else if ((l_TGT0_ATTR_CHIP_EC_FEATURE_NMMU_DMT_DD2 != literal_0))
+                {
+                    constexpr auto l_NMMU_MM_PIPE_THREAD_MODE_MULTI_THREAD_MODE_DYN_ST_EN_HANGP_DIS_MT_INV = 0x177;
+                    l_scom_buffer.insert<20, 1, 52, uint64_t>(l_NMMU_MM_PIPE_THREAD_MODE_MULTI_THREAD_MODE_DYN_ST_EN_HANGP_DIS_MT_INV );
+                    l_scom_buffer.insert<24, 1, 57, uint64_t>(l_NMMU_MM_PIPE_THREAD_MODE_MULTI_THREAD_MODE_DYN_ST_EN_HANGP_DIS_MT_INV );
+                    l_scom_buffer.insert<26, 1, 58, uint64_t>(l_NMMU_MM_PIPE_THREAD_MODE_MULTI_THREAD_MODE_DYN_ST_EN_HANGP_DIS_MT_INV );
+                }
+            }
+
+            if ((l_TGT0_ATTR_CHIP_EC_FEATURE_NMMU_DMT_DD2 == literal_0))
+            {
+                l_scom_buffer.insert<0, 12, 52, uint64_t>(literal_0x00E );
+            }
+            else if ((l_TGT0_ATTR_CHIP_EC_FEATURE_NMMU_DMT_DD2 != literal_0))
+            {
+                l_scom_buffer.insert<0, 12, 52, uint64_t>(literal_0x000 );
+            }
+
+            constexpr auto l_NMMU_MM_CFG_NMMU_CTL_TW_RDX_PWC_DIS_ON = 0x1;
+            l_scom_buffer.insert<52, 1, 63, uint64_t>(l_NMMU_MM_CFG_NMMU_CTL_TW_RDX_PWC_DIS_ON );
+
+            if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) )
+            {
+                constexpr auto l_NMMU_MM_CFG_NMMU_CTL_TW_LCO_RDX_EN_ON = 0x1;
+                l_scom_buffer.insert<44, 1, 63, uint64_t>(l_NMMU_MM_CFG_NMMU_CTL_TW_LCO_RDX_EN_ON );
+            }
+
+            if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) )
+            {
+                constexpr auto l_NMMU_MM_CFG_NMMU_CTL_TW_LCO_RDX_PDE_EN_ON = 0x1;
+                l_scom_buffer.insert<51, 1, 63, uint64_t>(l_NMMU_MM_CFG_NMMU_CTL_TW_LCO_RDX_PDE_EN_ON );
             }
 
-            l_scom_buffer.insert<30, 1, 59, uint64_t>(literal_0b11111 );
-            l_scom_buffer.insert<60, 4, 60, uint64_t>(literal_0b11111 );
-            l_scom_buffer.insert<0, 12, 52, uint64_t>(literal_0x00E );
             FAPI_TRY(fapi2::putScom(TGT0, 0x5012c52ull, l_scom_buffer));
         }
         {
             FAPI_TRY(fapi2::getScom( TGT0, 0x5012c53ull, l_scom_buffer ));
 
+            l_scom_buffer.insert<32, 16, 48, uint64_t>(literal_0x0258 );
+
             if (((l_chip_id == 0x5) && (l_chip_ec == 0x10)) )
             {
-                constexpr auto l_NMMU_MM_PIPE_THREAD_MODE_SINGLE_THREAD_MODE_ST_INV = 0x70;
-                l_scom_buffer.insert<2, 2, 60, uint64_t>(l_NMMU_MM_PIPE_THREAD_MODE_SINGLE_THREAD_MODE_ST_INV );
+                if ((l_TGT0_ATTR_CHIP_EC_FEATURE_NMMU_DMT_DD2 == literal_0))
+                {
+                    constexpr auto l_NMMU_MM_PIPE_THREAD_MODE_SINGLE_THREAD_MODE_ST_INV = 0x70;
+                    l_scom_buffer.insert<2, 2, 60, uint64_t>(l_NMMU_MM_PIPE_THREAD_MODE_SINGLE_THREAD_MODE_ST_INV );
+                }
+                else if ((l_TGT0_ATTR_CHIP_EC_FEATURE_NMMU_DMT_DD2 != literal_0))
+                {
+                    constexpr auto l_NMMU_MM_PIPE_THREAD_MODE_MULTI_THREAD_MODE_DYN_ST_EN_HANGP_DIS_MT_INV = 0xb;
+                    l_scom_buffer.insert<2, 2, 60, uint64_t>(l_NMMU_MM_PIPE_THREAD_MODE_MULTI_THREAD_MODE_DYN_ST_EN_HANGP_DIS_MT_INV );
+                }
             }
             else if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) )
             {
-                constexpr auto l_NMMU_MM_PIPE_THREAD_MODE_SINGLE_THREAD_MODE_ST_INV = 0xe00;
-                l_scom_buffer.insert<2, 2, 55, uint64_t>(l_NMMU_MM_PIPE_THREAD_MODE_SINGLE_THREAD_MODE_ST_INV );
+                if ((l_TGT0_ATTR_CHIP_EC_FEATURE_NMMU_DMT_DD2 == literal_0))
+                {
+                    constexpr auto l_NMMU_MM_PIPE_THREAD_MODE_SINGLE_THREAD_MODE_ST_INV = 0xe00;
+                    l_scom_buffer.insert<2, 2, 55, uint64_t>(l_NMMU_MM_PIPE_THREAD_MODE_SINGLE_THREAD_MODE_ST_INV );
+                }
+                else if ((l_TGT0_ATTR_CHIP_EC_FEATURE_NMMU_DMT_DD2 != literal_0))
+                {
+                    constexpr auto l_NMMU_MM_PIPE_THREAD_MODE_MULTI_THREAD_MODE_DYN_ST_EN_HANGP_DIS_MT_INV = 0x177;
+                    l_scom_buffer.insert<2, 2, 55, uint64_t>(l_NMMU_MM_PIPE_THREAD_MODE_MULTI_THREAD_MODE_DYN_ST_EN_HANGP_DIS_MT_INV );
+                }
             }
 
-            l_scom_buffer.insert<32, 16, 48, uint64_t>(literal_0x0258 );
             FAPI_TRY(fapi2::putScom(TGT0, 0x5012c53ull, l_scom_buffer));
         }
         {
@@ -150,14 +271,37 @@ fapi2::ReturnCode p9_mmu_scom(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>&
 
             if (((l_chip_id == 0x5) && (l_chip_ec == 0x10)) )
             {
-                constexpr auto l_NMMU_MM_PIPE_THREAD_MODE_SINGLE_THREAD_MODE_ST_INV = 0x70;
-                l_scom_buffer.insert<16, 1, 58, uint64_t>(l_NMMU_MM_PIPE_THREAD_MODE_SINGLE_THREAD_MODE_ST_INV );
+                if ((l_TGT0_ATTR_CHIP_EC_FEATURE_NMMU_DMT_DD2 == literal_0))
+                {
+                    constexpr auto l_NMMU_MM_PIPE_THREAD_MODE_SINGLE_THREAD_MODE_ST_INV = 0x70;
+                    l_scom_buffer.insert<16, 1, 58, uint64_t>(l_NMMU_MM_PIPE_THREAD_MODE_SINGLE_THREAD_MODE_ST_INV );
+                }
+                else if ((l_TGT0_ATTR_CHIP_EC_FEATURE_NMMU_DMT_DD2 != literal_0))
+                {
+                    constexpr auto l_NMMU_MM_PIPE_THREAD_MODE_MULTI_THREAD_MODE_DYN_ST_EN_HANGP_DIS_MT_INV = 0xb;
+                    l_scom_buffer.insert<16, 1, 58, uint64_t>(l_NMMU_MM_PIPE_THREAD_MODE_MULTI_THREAD_MODE_DYN_ST_EN_HANGP_DIS_MT_INV );
+                }
             }
             else if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) )
             {
-                constexpr auto l_NMMU_MM_PIPE_THREAD_MODE_SINGLE_THREAD_MODE_ST_INV = 0xe00;
-                l_scom_buffer.insert<16, 1, 53, uint64_t>(l_NMMU_MM_PIPE_THREAD_MODE_SINGLE_THREAD_MODE_ST_INV );
-                l_scom_buffer.insert<58, 2, 59, uint64_t>(l_NMMU_MM_PIPE_THREAD_MODE_SINGLE_THREAD_MODE_ST_INV );
+                if ((l_TGT0_ATTR_CHIP_EC_FEATURE_NMMU_DMT_DD2 == literal_0))
+                {
+                    constexpr auto l_NMMU_MM_PIPE_THREAD_MODE_SINGLE_THREAD_MODE_ST_INV = 0xe00;
+                    l_scom_buffer.insert<16, 1, 53, uint64_t>(l_NMMU_MM_PIPE_THREAD_MODE_SINGLE_THREAD_MODE_ST_INV );
+                    l_scom_buffer.insert<58, 2, 59, uint64_t>(l_NMMU_MM_PIPE_THREAD_MODE_SINGLE_THREAD_MODE_ST_INV );
+                }
+                else if ((l_TGT0_ATTR_CHIP_EC_FEATURE_NMMU_DMT_DD2 != literal_0))
+                {
+                    constexpr auto l_NMMU_MM_PIPE_THREAD_MODE_MULTI_THREAD_MODE_DYN_ST_EN_HANGP_DIS_MT_INV = 0x177;
+                    l_scom_buffer.insert<16, 1, 53, uint64_t>(l_NMMU_MM_PIPE_THREAD_MODE_MULTI_THREAD_MODE_DYN_ST_EN_HANGP_DIS_MT_INV );
+                    l_scom_buffer.insert<58, 2, 59, uint64_t>(l_NMMU_MM_PIPE_THREAD_MODE_MULTI_THREAD_MODE_DYN_ST_EN_HANGP_DIS_MT_INV );
+                }
+            }
+
+            if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) )
+            {
+                constexpr auto l_NMMU_MM_CFG_TWSM_SPLIT_MODE_TWSM_SPLIT_08_TLB_04_SLB = 0x0;
+                l_scom_buffer.insert<57, 1, 62, uint64_t>(l_NMMU_MM_CFG_TWSM_SPLIT_MODE_TWSM_SPLIT_08_TLB_04_SLB );
             }
 
             FAPI_TRY(fapi2::putScom(TGT0, 0x5012c54ull, l_scom_buffer));
@@ -165,22 +309,63 @@ fapi2::ReturnCode p9_mmu_scom(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>&
         {
             FAPI_TRY(fapi2::getScom( TGT0, 0x5012c55ull, l_scom_buffer ));
 
+            constexpr auto l_NMMU_MM_CFG_NMMU_CTL_TLB_ISS543B_FIX_EN_ON = 0x1;
+            l_scom_buffer.insert<53, 1, 63, uint64_t>(l_NMMU_MM_CFG_NMMU_CTL_TLB_ISS543B_FIX_EN_ON );
+
             if (((l_chip_id == 0x5) && (l_chip_ec == 0x10)) )
             {
-                constexpr auto l_NMMU_MM_PIPE_THREAD_MODE_SINGLE_THREAD_MODE_ST_INV = 0x70;
-                l_scom_buffer.insert<16, 1, 59, uint64_t>(l_NMMU_MM_PIPE_THREAD_MODE_SINGLE_THREAD_MODE_ST_INV );
+                if ((l_TGT0_ATTR_CHIP_EC_FEATURE_NMMU_DMT_DD2 == literal_0))
+                {
+                    constexpr auto l_NMMU_MM_PIPE_THREAD_MODE_SINGLE_THREAD_MODE_ST_INV = 0x70;
+                    l_scom_buffer.insert<16, 1, 59, uint64_t>(l_NMMU_MM_PIPE_THREAD_MODE_SINGLE_THREAD_MODE_ST_INV );
+                }
+                else if ((l_TGT0_ATTR_CHIP_EC_FEATURE_NMMU_DMT_DD2 != literal_0))
+                {
+                    constexpr auto l_NMMU_MM_PIPE_THREAD_MODE_MULTI_THREAD_MODE_DYN_ST_EN_HANGP_DIS_MT_INV = 0xb;
+                    l_scom_buffer.insert<16, 1, 59, uint64_t>(l_NMMU_MM_PIPE_THREAD_MODE_MULTI_THREAD_MODE_DYN_ST_EN_HANGP_DIS_MT_INV );
+                }
             }
             else if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) )
             {
-                constexpr auto l_NMMU_MM_PIPE_THREAD_MODE_SINGLE_THREAD_MODE_ST_INV = 0xe00;
-                l_scom_buffer.insert<16, 1, 54, uint64_t>(l_NMMU_MM_PIPE_THREAD_MODE_SINGLE_THREAD_MODE_ST_INV );
-                l_scom_buffer.insert<58, 2, 61, uint64_t>(l_NMMU_MM_PIPE_THREAD_MODE_SINGLE_THREAD_MODE_ST_INV );
+                if ((l_TGT0_ATTR_CHIP_EC_FEATURE_NMMU_DMT_DD2 == literal_0))
+                {
+                    constexpr auto l_NMMU_MM_PIPE_THREAD_MODE_SINGLE_THREAD_MODE_ST_INV = 0xe00;
+                    l_scom_buffer.insert<16, 1, 54, uint64_t>(l_NMMU_MM_PIPE_THREAD_MODE_SINGLE_THREAD_MODE_ST_INV );
+                    l_scom_buffer.insert<58, 2, 61, uint64_t>(l_NMMU_MM_PIPE_THREAD_MODE_SINGLE_THREAD_MODE_ST_INV );
+                }
+                else if ((l_TGT0_ATTR_CHIP_EC_FEATURE_NMMU_DMT_DD2 != literal_0))
+                {
+                    constexpr auto l_NMMU_MM_PIPE_THREAD_MODE_MULTI_THREAD_MODE_DYN_ST_EN_HANGP_DIS_MT_INV = 0x177;
+                    l_scom_buffer.insert<16, 1, 54, uint64_t>(l_NMMU_MM_PIPE_THREAD_MODE_MULTI_THREAD_MODE_DYN_ST_EN_HANGP_DIS_MT_INV );
+                    l_scom_buffer.insert<58, 2, 61, uint64_t>(l_NMMU_MM_PIPE_THREAD_MODE_MULTI_THREAD_MODE_DYN_ST_EN_HANGP_DIS_MT_INV );
+                }
+            }
+
+            if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) )
+            {
+                constexpr auto l_NMMU_MM_MPSS_MODE_MPSS_ENA_PREF_PGSZ_ENA_G_64KB_H_64KB = 0x155;
+                l_scom_buffer.insert<19, 1, 54, uint64_t>(l_NMMU_MM_MPSS_MODE_MPSS_ENA_PREF_PGSZ_ENA_G_64KB_H_64KB );
+                l_scom_buffer.insert<56, 1, 55, uint64_t>(l_NMMU_MM_MPSS_MODE_MPSS_ENA_PREF_PGSZ_ENA_G_64KB_H_64KB );
+                l_scom_buffer.insert<44, 8, 56, uint64_t>(l_NMMU_MM_MPSS_MODE_MPSS_ENA_PREF_PGSZ_ENA_G_64KB_H_64KB );
+            }
+
+            if ((l_TGT0_ATTR_CHIP_EC_FEATURE_NMMU_DMT_DD2 == literal_0))
+            {
+                constexpr auto l_NMMU_MM_CFG_NMMU_CTL_TLB_HASH_PID_DIS_ON = 0x1;
+                l_scom_buffer.insert<21, 1, 63, uint64_t>(l_NMMU_MM_CFG_NMMU_CTL_TLB_HASH_PID_DIS_ON );
+            }
+            else if ((l_TGT0_ATTR_CHIP_EC_FEATURE_NMMU_DMT_DD2 != literal_0))
+            {
+                constexpr auto l_NMMU_MM_CFG_NMMU_CTL_TLB_HASH_PID_DIS_OFF = 0x0;
+                l_scom_buffer.insert<21, 1, 63, uint64_t>(l_NMMU_MM_CFG_NMMU_CTL_TLB_HASH_PID_DIS_OFF );
+            }
+
+            if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) )
+            {
+                constexpr auto l_NMMU_MM_CFG_TWSM_SPLIT_MODE_TWSM_SPLIT_08_TLB_04_SLB = 0x0;
+                l_scom_buffer.insert<57, 1, 63, uint64_t>(l_NMMU_MM_CFG_TWSM_SPLIT_MODE_TWSM_SPLIT_08_TLB_04_SLB );
             }
 
-            constexpr auto l_NMMU_MM_CFG_NMMU_CTL_TLB_HASH_PID_DIS_ON = 0x1;
-            l_scom_buffer.insert<21, 1, 63, uint64_t>(l_NMMU_MM_CFG_NMMU_CTL_TLB_HASH_PID_DIS_ON );
-            constexpr auto l_NMMU_MM_CFG_NMMU_CTL_TLB_ISS543B_FIX_EN_ON = 0x1;
-            l_scom_buffer.insert<53, 1, 63, uint64_t>(l_NMMU_MM_CFG_NMMU_CTL_TLB_ISS543B_FIX_EN_ON );
             FAPI_TRY(fapi2::putScom(TGT0, 0x5012c55ull, l_scom_buffer));
         }
 
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml
index adb15d17..7d4c58e6 100644
--- a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml
+++ b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml
@@ -1670,6 +1670,88 @@
       </chip>
     </chipEcFeature>
   </attribute>
+  <!-- ********************************************************************* -->
+  <attribute>
+    <id>ATTR_CHIP_EC_FEATURE_NMMU_DMT_DD2</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>
+      Sets inits for DD2, also DMT mode
+    </description>
+    <chipEcFeature>
+      <chip>
+        <name>ENUM_ATTR_NAME_NIMBUS</name>
+        <ec>
+          <value>0x20</value>
+          <test>GREATER_THAN_OR_EQUAL</test>
+        </ec>
+      </chip>
+      <chip>
+        <name>ENUM_ATTR_NAME_CUMULUS</name>
+        <ec>
+          <value>0x10</value>
+          <test>GREATER_THAN_OR_EQUAL</test>
+        </ec>
+      </chip>
+    </chipEcFeature>
+  </attribute>
+  <!-- ******************************************************************** -->
+  <attribute>
+    <id>ATTR_CHIP_EC_FEATURE_NMMU_PWC_DIS_DD2</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>
+      PWC disable for DD2
+    </description>
+    <chipEcFeature>
+      <chip>
+        <name>ENUM_ATTR_NAME_NIMBUS</name>
+        <ec>
+          <value>0x20</value>
+          <test>LESS_THAN_OR_EQUAL</test>
+        </ec>
+      </chip>
+    </chipEcFeature>
+  </attribute>
+  <!-- ******************************************************************** -->
+    <attribute>
+    <id>ATTR_CHIP_EC_FEATURE_NMMU_PDE_EN_DD2</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>
+      Enabling PDE fix for dd2 only, not needed going forward
+    </description>
+    <chipEcFeature>
+      <chip>
+        <name>ENUM_ATTR_NAME_NIMBUS</name>
+        <ec>
+          <value>0x20</value>
+          <test>EQUAL</test>
+        </ec>
+      </chip>
+    </chipEcFeature>
+  </attribute>
+  <!-- ******************************************************************** -->
+    <attribute>
+    <id>ATTR_CHIP_EC_FEATURE_NMMU_ISS734_DD2_1</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>
+      issue734 dial, exists dd2.1+
+    </description>
+    <chipEcFeature>
+      <chip>
+        <name>ENUM_ATTR_NAME_NIMBUS</name>
+        <ec>
+          <value>0x21</value>
+          <test>GREATER_THAN_OR_EQUAL</test>
+        </ec>
+      </chip>
+      <chip>
+        <name>ENUM_ATTR_NAME_CUMULUS</name>
+        <ec>
+          <value>0x10</value>
+          <test>GREATER_THAN_OR_EQUAL</test>
+        </ec>
+      </chip>
+    </chipEcFeature>
+  </attribute>
   <!-- ******************************************************************** -->
   <attribute>
     <id>ATTR_CHIP_EC_FEATURE_HW378025</id>
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml
index ca427f18..d1d7d87d 100644
--- a/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml
+++ b/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml
@@ -395,6 +395,10 @@ attribute tank
         <virtual/>
   </entry>
 
+  <entry>
+        <name>ATTR_CHIP_EC_FEATURE_NMMU_DMT_DD2</name>
+        <virtual/>
+  </entry>
 
   <entry>
         <name>ATTR_PROC_XSCOM_BAR_BASE_ADDR_OFFSET</name>