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authorLuke C. Murray <murrayl@us.ibm.com>2017-10-25 11:27:59 -0500
committerSachin Gupta <sgupta2m@in.ibm.com>2017-10-27 21:46:23 -0400
commit71e4d374a79ab7c17c84f42bfcc705b4fe9ba61a (patch)
tree9332da7b60c86c8e5c70fc5e933a0958318f4f6a /src
parentd38834b0a952af1b3b1ed4a008cafe2c4221485a (diff)
downloadtalos-sbe-71e4d374a79ab7c17c84f42bfcc705b4fe9ba61a.tar.gz
talos-sbe-71e4d374a79ab7c17c84f42bfcc705b4fe9ba61a.zip
Turning on NCU tlbie pacing by default
Change-Id: I954651af59c18401a9bd5f389f86b8faf799edbd Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48817 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48821 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src')
-rw-r--r--src/import/chips/p9/procedures/hwp/initfiles/p9_ncu_scom.C34
-rw-r--r--src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml17
2 files changed, 51 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9_ncu_scom.C b/src/import/chips/p9/procedures/hwp/initfiles/p9_ncu_scom.C
index 4002015c..396b1b07 100644
--- a/src/import/chips/p9/procedures/hwp/initfiles/p9_ncu_scom.C
+++ b/src/import/chips/p9/procedures/hwp/initfiles/p9_ncu_scom.C
@@ -29,6 +29,8 @@
using namespace fapi2;
+constexpr uint64_t literal_0x3 = 0x3;
+constexpr uint64_t literal_0x4 = 0x4;
constexpr uint64_t literal_0b0001 = 0b0001;
constexpr uint64_t literal_0b0100 = 0b0100;
constexpr uint64_t literal_0x8 = 0x8;
@@ -69,6 +71,31 @@ fapi2::ReturnCode p9_ncu_scom(const fapi2::Target<fapi2::TARGET_TYPE_EX>& TGT0,
}
}
+ if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x21)) || ((l_chip_id == 0x5)
+ && (l_chip_ec == 0x22)) || ((l_chip_id == 0x6) && (l_chip_ec == 0x10)) )
+ {
+ constexpr auto l_EXP_NC_NCMISC_NCSCOMS_TLBIE_PACING_CNT_EN_ON = 0x1;
+ l_scom_buffer.insert<10, 1, 63, uint64_t>(l_EXP_NC_NCMISC_NCSCOMS_TLBIE_PACING_CNT_EN_ON );
+ }
+
+ if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x21)) || ((l_chip_id == 0x5)
+ && (l_chip_ec == 0x22)) || ((l_chip_id == 0x6) && (l_chip_ec == 0x10)) )
+ {
+ l_scom_buffer.insert<19, 8, 56, uint64_t>(literal_0x3 );
+ }
+
+ if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x21)) || ((l_chip_id == 0x5)
+ && (l_chip_ec == 0x22)) || ((l_chip_id == 0x6) && (l_chip_ec == 0x10)) )
+ {
+ l_scom_buffer.insert<11, 8, 56, uint64_t>(literal_0x4 );
+ }
+
+ if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x21)) || ((l_chip_id == 0x5)
+ && (l_chip_ec == 0x22)) || ((l_chip_id == 0x6) && (l_chip_ec == 0x10)) )
+ {
+ l_scom_buffer.insert<27, 8, 56, uint64_t>(literal_0x4 );
+ }
+
FAPI_TRY(fapi2::putScom(TGT0, 0x1001100aull, l_scom_buffer));
}
{
@@ -85,6 +112,13 @@ fapi2::ReturnCode p9_ncu_scom(const fapi2::Target<fapi2::TARGET_TYPE_EX>& TGT0,
{
FAPI_TRY(fapi2::getScom( TGT0, 0x1001100cull, l_scom_buffer ));
+ if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x21)) || ((l_chip_id == 0x5)
+ && (l_chip_ec == 0x22)) || ((l_chip_id == 0x6) && (l_chip_ec == 0x10)) )
+ {
+ constexpr auto l_EXP_NC_NCMISC_NCSCOMS_TLBIE_PACING_MST_DLY_EN_ON = 0x1;
+ l_scom_buffer.insert<16, 1, 63, uint64_t>(l_EXP_NC_NCMISC_NCSCOMS_TLBIE_PACING_MST_DLY_EN_ON );
+ }
+
constexpr auto l_EXP_NC_NCMISC_NCSCOMS_TLBIE_STALL_EN_ON = 0x1;
l_scom_buffer.insert<0, 1, 63, uint64_t>(l_EXP_NC_NCMISC_NCSCOMS_TLBIE_STALL_EN_ON );
l_scom_buffer.insert<1, 3, 61, uint64_t>(literal_6 );
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml
index cdd604b8..27492902 100644
--- a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml
+++ b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml
@@ -2235,6 +2235,23 @@
</attribute>
<!-- ******************************************************************** -->
<attribute>
+ <id>ATTR_CHIP_EC_FEATURE_DISABLE_TLBIE_PACING</id>>
+ <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+ <description>
+ Nimbus DD1 only: don't set tlbie pacing, dials didn't exist
+ </description>
+ <chipEcFeature>
+ <chip>
+ <name>ENUM_ATTR_NAME_NIMBUS</name>
+ <ec>
+ <value>0x20</value>
+ <test>LESS_THAN</test>
+ </ec>
+ </chip>
+ </chipEcFeature>
+ </attribute>
+ <!-- ******************************************************************** -->
+ <attribute>
<id>ATTR_CHIP_EC_FEATURE_HW408892</id>
<targetType>TARGET_TYPE_PROC_CHIP</targetType>
<description>
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