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| author | Raja Das <rajadas2@in.ibm.com> | 2017-04-18 01:04:16 -0500 |
|---|---|---|
| committer | AMIT J. TENDOLKAR <amit.tendolkar@in.ibm.com> | 2017-04-18 05:32:04 -0400 |
| commit | 6ffb94a25a94db2380f40e154bdd707f0d8e601d (patch) | |
| tree | 21957443f0b30ffd6038d99845252d474f93858d /src | |
| parent | 6d8a7911a3cad8b5110e7a3c50fe28f7ce81a9b5 (diff) | |
| download | talos-sbe-6ffb94a25a94db2380f40e154bdd707f0d8e601d.tar.gz talos-sbe-6ffb94a25a94db2380f40e154bdd707f0d8e601d.zip | |
Fixed bit shift bug for PERV_N3_LOCAL_FIR_OR reg (DMT/MPIPL)
Change-Id: Id47a94b938ba5ffef364542295da21409433971d
CQ: SW380791
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39356
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: AMIT J. TENDOLKAR <amit.tendolkar@in.ibm.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/sbefw/sbecmdcntrldmt.C | 2 | ||||
| -rw-r--r-- | src/sbefw/sbecmdcntrldmt.H | 7 | ||||
| -rw-r--r-- | src/sbefw/sbecmdiplcontrol.C | 7 |
3 files changed, 9 insertions, 7 deletions
diff --git a/src/sbefw/sbecmdcntrldmt.C b/src/sbefw/sbecmdcntrldmt.C index 79c61697..7bbab5b2 100644 --- a/src/sbefw/sbecmdcntrldmt.C +++ b/src/sbefw/sbecmdcntrldmt.C @@ -73,7 +73,7 @@ void sbeDmtPkExpiryCallback(void *) // check stop the system plat_target_handle_t l_hndl; fapiRc = putscom_abs_wrap(&l_hndl, PERV_N3_LOCAL_FIR_OR, - N3_FIR_CORE_CHECKSTOP_BIT); + ((uint64_t)1 << N3_FIR_CORE_CHECKSTOP_BIT)); if(fapiRc != FAPI2_RC_SUCCESS) { // Scom failed diff --git a/src/sbefw/sbecmdcntrldmt.H b/src/sbefw/sbecmdcntrldmt.H index 29b4799d..a397e153 100644 --- a/src/sbefw/sbecmdcntrldmt.H +++ b/src/sbefw/sbecmdcntrldmt.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER sbe Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2016 */ +/* Contributors Listed Below - COPYRIGHT 2016,2017 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -38,8 +38,9 @@ // for DMT functionality in Millisecond static const uint8_t SBE_DMT_SLEEP_INTERVAL = 1; -// Bit-32 used to checkstop the system -static const uint64_t N3_FIR_CORE_CHECKSTOP_BIT = 32; +// Bit-32 used to checkstop the system, since this is directly getting +// inserted, we need to use bit (63-32) = 31st bit. +static const uint64_t N3_FIR_CORE_CHECKSTOP_BIT = 31; // 63-32 = 31 /** * @brief Callback for Timer Expiry for DMT diff --git a/src/sbefw/sbecmdiplcontrol.C b/src/sbefw/sbecmdiplcontrol.C index baefb096..c1a2bb9b 100644 --- a/src/sbefw/sbecmdiplcontrol.C +++ b/src/sbefw/sbecmdiplcontrol.C @@ -219,8 +219,9 @@ static const uint32_t SBE_SYSTEM_QUIESCE_TIMEOUT_LOOP = 3; static const uint64_t SBE_LQA_DELAY_HW_US = 1000000ULL; // 1ms static const uint64_t SBE_LQA_DELAY_SIM_CYCLES = 0x1ULL; -// Bit-33 used to checkstop the system -static const uint64_t N3_FIR_SYSTEM_CHECKSTOP_BIT = 33; +// Bit-33 used to checkstop the system, Since this is directly getting inserted +// will have to use bit (63-33) = 30th bit +static const uint64_t N3_FIR_SYSTEM_CHECKSTOP_BIT = 30; // 63-33 = 30 // Globals // TODO: via RTC 123602 This global needs to move to a class that will store the @@ -1104,7 +1105,7 @@ ReturnCode istepWithProcSequenceDrtm( sbeIstepHwp_t i_hwp) // TODO RTC 164425 this needs to be replicated on any MPIPL Hwp failure Target<TARGET_TYPE_PROC_CHIP > l_proc = plat_getChipTarget(); l_rc = putscom_abs_wrap(&l_proc, PERV_N3_LOCAL_FIR_OR, - N3_FIR_SYSTEM_CHECKSTOP_BIT); + ((uint64_t)1 << N3_FIR_SYSTEM_CHECKSTOP_BIT)); if(l_rc != FAPI2_RC_SUCCESS) { // Scom failed |
