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authorJoe McGill <jmcgill@us.ibm.com>2017-11-07 15:14:38 -0600
committerSachin Gupta <sgupta2m@in.ibm.com>2017-12-12 21:10:05 -0500
commit4d8b2fe78a663d4edffc9bb16aa978873d4bf134 (patch)
treeb25a2f9e42db4abe94de63773dd00dda6bcacacd /src
parentb125b82562fc7f81196fc95a0db0d91a1fc211db (diff)
downloadtalos-sbe-4d8b2fe78a663d4edffc9bb16aa978873d4bf134.tar.gz
talos-sbe-4d8b2fe78a663d4edffc9bb16aa978873d4bf134.zip
support customized application of filter PLL buckets from AW MVPD keyword
pervasive_attributes.xml sbe_attributes.xml create ATTR_FILTER_PLL_BUCKET to encapsulate BGoffset selection p9.filter.pll.overlay.scan.initfile generate correct BGoffset value based on ATTR_FILTER_PLL_BUCKET value build must process 4x (ATTR values 1..4) to generate set of ring images p9_xip_customize.C consume AW keyword from MVPD, set ATTR_FILTER_PLL_BUCKET for HB platform and customize into SBE image if attribute is present in image p9_sbe_npll_initf.C p9_sbe_npll_initf_errors.xml re-scan perv_pll_bndy ring with selected BGoffset overlay when ATTR_fILTER_PLL_BUCKET is non-zero p9_sbe_chiplet_pll_initf.C p9_sbe_chiplet_pll_initf_errors.xml adapt to error XML updates in p9_sbe_npll_initf Change-Id: Id09074d12e95ffc44337e32ec683056d8ec390f3 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49442 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Claus M. Olsen <cmolsen@us.ibm.com> Reviewed-by: Sumit Kumar <sumit_kumar@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49460 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src')
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_pll_initf.C6
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_npll_initf.C85
-rw-r--r--src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml4
-rwxr-xr-xsrc/import/chips/p9/procedures/xml/attribute_info/pervasive_attributes.xml10
-rwxr-xr-xsrc/import/chips/p9/procedures/xml/error_info/p9_sbe_chiplet_pll_initf_errors.xml8
-rwxr-xr-xsrc/import/chips/p9/procedures/xml/error_info/p9_sbe_npll_initf_errors.xml14
6 files changed, 107 insertions, 20 deletions
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_pll_initf.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_pll_initf.C
index 3be00ec9..130367d6 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_pll_initf.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_pll_initf.C
@@ -267,10 +267,10 @@ fapi2::ReturnCode p9_sbe_chiplet_pll_initf(const
default:
FAPI_ASSERT(false,
- fapi2::P9_SBE_NPLL_INITF_UNSUPPORTED_BUCKET().
+ fapi2::P9_SBE_CHIPLET_PLL_INITF_UNSUPPORTED_MC_BUCKET().
set_TARGET(i_target_chip).
- set_BUCKET_INDEX(l_nest_pll_bucket),
- "Unsupported Nest PLL bucket value!");
+ set_BUCKET_INDEX(l_set_mc_bucket),
+ "Unsupported MC PLL bucket value!");
}
FAPI_DBG("Scan mc_pll_bndy_bucket_%d ring", l_nest_pll_bucket);
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_npll_initf.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_npll_initf.C
index 9d2bea36..ed1b4ff3 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_npll_initf.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_npll_initf.C
@@ -40,51 +40,104 @@
#include "p9_sbe_npll_initf.H"
#include <p9_ring_id.h>
-fapi2::ReturnCode p9_sbe_npll_initf(const
- fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target_chip)
+fapi2::ReturnCode p9_sbe_npll_initf(
+ const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target_chip)
{
FAPI_INF("p9_sbe_npll_initf: Entering ...");
- uint8_t l_read_attr = 0;
const fapi2::Target<fapi2::TARGET_TYPE_SYSTEM> FAPI_SYSTEM;
- RingID ringID = perv_pll_bndy_bucket_1;
+ uint8_t l_npll_bucket = 0;
+ RingID l_npll_ring_id = perv_pll_bndy_bucket_1;
+ uint8_t l_fpll_bucket = 0;
+ RingID l_fpll_ring_id = perv_pll_bndy_flt_1;
- FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_NEST_PLL_BUCKET, FAPI_SYSTEM , l_read_attr),
+ FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_NEST_PLL_BUCKET,
+ FAPI_SYSTEM ,
+ l_npll_bucket),
"Error from FAPI_ATTR_GET (ATTR_NEST_PLL_BUCKET)");
- switch(l_read_attr)
+ FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_FILTER_PLL_BUCKET,
+ i_target_chip,
+ l_fpll_bucket),
+ "Error from FAPI_ATTR_GET (ATTR_FILTER_PLL_BUCKET)");
+
+ switch (l_npll_bucket)
{
case 1:
- ringID = perv_pll_bndy_bucket_1;
+ l_npll_ring_id = perv_pll_bndy_bucket_1;
break;
case 2:
- ringID = perv_pll_bndy_bucket_2;
+ l_npll_ring_id = perv_pll_bndy_bucket_2;
break;
case 3:
- ringID = perv_pll_bndy_bucket_3;
+ l_npll_ring_id = perv_pll_bndy_bucket_3;
break;
case 4:
- ringID = perv_pll_bndy_bucket_4;
+ l_npll_ring_id = perv_pll_bndy_bucket_4;
break;
case 5:
- ringID = perv_pll_bndy_bucket_5;
+ l_npll_ring_id = perv_pll_bndy_bucket_5;
break;
default:
FAPI_ASSERT(false,
- fapi2::P9_SBE_NPLL_INITF_UNSUPPORTED_BUCKET().
+ fapi2::P9_SBE_NPLL_INITF_UNSUPPORTED_NPLL_BUCKET().
set_TARGET(i_target_chip).
- set_BUCKET_INDEX(l_read_attr),
+ set_BUCKET_INDEX(l_npll_bucket),
"Unsupported Nest PLL bucket value!");
}
- FAPI_DBG("Scan perv_pll_bndy_bucket_%d ring", l_read_attr);
- FAPI_TRY(fapi2::putRing(i_target_chip, ringID, fapi2::RING_MODE_SET_PULSE_NSL),
- "Error from putRing (perv_pll_bndy, ringID: %d)", ringID);
+ // scan PLL ring once to establish nest PLL
+ FAPI_DBG("Scan perv_pll_bndy_bucket_%d ring",
+ l_npll_bucket);
+ FAPI_TRY(fapi2::putRing(i_target_chip,
+ l_npll_ring_id,
+ fapi2::RING_MODE_SET_PULSE_NSL),
+ "Error from putRing (perv_pll_bndy, l_npll_ring_id: %d)",
+ l_npll_ring_id);
+
+ if (l_fpll_bucket)
+ {
+ switch (l_fpll_bucket)
+ {
+ case 1:
+ l_fpll_ring_id = perv_pll_bndy_flt_1;
+ break;
+
+ case 2:
+ l_fpll_ring_id = perv_pll_bndy_flt_2;
+ break;
+
+ case 3:
+ l_fpll_ring_id = perv_pll_bndy_flt_3;
+ break;
+
+ case 4:
+ l_fpll_ring_id = perv_pll_bndy_flt_4;
+ break;
+
+ default:
+ FAPI_ASSERT(false,
+ fapi2::P9_SBE_NPLL_INITF_UNSUPPORTED_FPLL_BUCKET().
+ set_TARGET(i_target_chip).
+ set_BUCKET_INDEX(l_fpll_bucket),
+ "Unsupported Filter PLL bucket value!");
+ }
+
+ // re-scan PLL ring to apply overlay containing filter PLL BGoffset
+ // selected from MVPD
+ FAPI_DBG("Re-scan perv_pll_bndy to apply perv_pll_bndy_flt_%d ring",
+ l_fpll_bucket);
+ FAPI_TRY(fapi2::putRing(i_target_chip,
+ l_fpll_ring_id,
+ fapi2::RING_MODE_SET_PULSE_NSL),
+ "Error from putRing (perv_pll_bndy, l_fpll_ring_id: %d)",
+ l_fpll_ring_id);
+ }
fapi_try_exit:
FAPI_INF("p9_sbe_npll_initf: Exiting ...");
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml
index 81583e27..91658d4f 100644
--- a/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml
+++ b/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml
@@ -62,6 +62,10 @@
<value>0x05</value>
</entry>
<entry>
+ <name>ATTR_FILTER_PLL_BUCKET</name>
+ <value>0x00</value>
+ </entry>
+ <entry>
<name>ATTR_OB0_PLL_BUCKET</name>
<value>0x01</value>
</entry>
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/pervasive_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/pervasive_attributes.xml
index 6039d77b..89e94730 100755
--- a/src/import/chips/p9/procedures/xml/attribute_info/pervasive_attributes.xml
+++ b/src/import/chips/p9/procedures/xml/attribute_info/pervasive_attributes.xml
@@ -141,6 +141,16 @@
</attribute>
<attribute>
+ <id>ATTR_FILTER_PLL_BUCKET</id>
+ <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+ <description>Select Filter PLL BGoffset programming</description>
+ <valueType>uint8</valueType>
+ <persistRuntime/>
+ <writeable/>
+ <initToZero/>
+</attribute>
+
+<attribute>
<id>ATTR_OB0_PLL_BUCKET</id>
<targetType>TARGET_TYPE_PROC_CHIP</targetType>
<description>Select OBUS0 pll setting from one of the supported frequencies</description>
diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_sbe_chiplet_pll_initf_errors.xml b/src/import/chips/p9/procedures/xml/error_info/p9_sbe_chiplet_pll_initf_errors.xml
index 6ebdf2f1..d8b240a5 100755
--- a/src/import/chips/p9/procedures/xml/error_info/p9_sbe_chiplet_pll_initf_errors.xml
+++ b/src/import/chips/p9/procedures/xml/error_info/p9_sbe_chiplet_pll_initf_errors.xml
@@ -48,4 +48,12 @@
<ffdc>OB3_BUCKET_INDEX</ffdc>
</hwpError>
<!-- ******************************************************************** -->
+ <hwpError>
+ <sbeError/>
+ <rc>RC_P9_SBE_CHIPLET_PLL_INITF_UNSUPPORTED_MC_BUCKET</rc>
+ <description>Unsupported MC PLL bucket select</description>
+ <ffdc>TARGET</ffdc>
+ <ffdc>BUCKET_INDEX</ffdc>
+ </hwpError>
+ <!-- ******************************************************************** -->
</hwpErrors>
diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_sbe_npll_initf_errors.xml b/src/import/chips/p9/procedures/xml/error_info/p9_sbe_npll_initf_errors.xml
index 5e227941..1153a479 100755
--- a/src/import/chips/p9/procedures/xml/error_info/p9_sbe_npll_initf_errors.xml
+++ b/src/import/chips/p9/procedures/xml/error_info/p9_sbe_npll_initf_errors.xml
@@ -27,7 +27,7 @@
<!-- ******************************************************************** -->
<hwpError>
<sbeError/>
- <rc>RC_P9_SBE_NPLL_INITF_UNSUPPORTED_BUCKET</rc>
+ <rc>RC_P9_SBE_NPLL_INITF_UNSUPPORTED_NPLL_BUCKET</rc>
<description>Unsupported Nest PLL bucket value</description>
<ffdc>TARGET</ffdc>
<ffdc>BUCKET_INDEX</ffdc>
@@ -37,4 +37,16 @@
</callout>
</hwpError>
<!-- ******************************************************************** -->
+ <hwpError>
+ <sbeError/>
+ <rc>RC_P9_SBE_NPLL_INITF_UNSUPPORTED_FPLL_BUCKET</rc>
+ <description>Unsupported Filter PLL bucket value</description>
+ <ffdc>TARGET</ffdc>
+ <ffdc>BUCKET_INDEX</ffdc>
+ <callout>
+ <procedure>CODE</procedure>
+ <priority>HIGH</priority>
+ </callout>
+ </hwpError>
+ <!-- ******************************************************************** -->
</hwpErrors>
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