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| author | Yue Du <daviddu@us.ibm.com> | 2016-11-15 23:54:14 -0600 |
|---|---|---|
| committer | spashabk-in <shakeebbk@in.ibm.com> | 2016-12-20 05:18:55 -0600 |
| commit | 4285cb20d62a9d275b8ce4cd4a1d235730328dd4 (patch) | |
| tree | d34bb15f28ccada1da7fbe632d7ca85b28efb390 /src | |
| parent | bede046554c480b50ee4edca01fa75e5b5991836 (diff) | |
| download | talos-sbe-4285cb20d62a9d275b8ce4cd4a1d235730328dd4.tar.gz talos-sbe-4285cb20d62a9d275b8ce4cd4a1d235730328dd4.zip | |
IStep4: add check for partial good cores under given ex
Change-Id: I122866f6848dd9a6a177764cb3d3b6c668800476
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32696
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Matt K. Light <mklight@us.ibm.com>
Dev-Ready: YUE DU <daviddu@us.ibm.com>
Reviewed-by: AMIT KUMAR <akumar3@us.ibm.com>
Reviewed-by: ADAM S. HALE <ashale@us.ibm.com>
Dev-Ready: ADAM S. HALE <ashale@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32725
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scominit.C | 67 |
1 files changed, 38 insertions, 29 deletions
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scominit.C b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scominit.C index d5aaa3f5..4fd2e2b3 100644 --- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scominit.C +++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scominit.C @@ -126,41 +126,50 @@ p9_hcd_cache_scominit( if (l_attr_sys_force_all_cores) { - fapi2::Target<fapi2::TARGET_TYPE_EX> l_ex = *l_iter; + fapi2::Target<fapi2::TARGET_TYPE_EX> l_ex = *l_iter; auto l_core_targets = l_ex.getChildren<fapi2::TARGET_TYPE_CORE>(); - auto l_core = l_core_targets.begin(); - fapi2::Target<fapi2::TARGET_TYPE_CORE> l_ec = *l_core; - fapi2::Target<fapi2::TARGET_TYPE_PERV> l_perv = - l_ec.getParent<fapi2::TARGET_TYPE_PERV>(); - - FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS, l_perv, - l_attr_chip_unit_pos)); - l_attr_chip_unit_pos = l_attr_chip_unit_pos - p9hcd::PERV_TO_CORE_POS_OFFSET; - l_exid = (l_attr_chip_unit_pos >> 1); - - FAPI_DBG("Setup L3-LCO on TARGET_ID[%d] via EX_L3_MODE_REG1[0,2-5,6-21]", l_exid); - FAPI_TRY(getScom(*l_iter, EX_L3_MODE_REG1, l_data64)); - l_data64.insertFromRight<2, 4>(l_exid).insertFromRight<6, 16>(l_exlist); - - if (l_excount > 1) - { - l_data64.setBit<0>(); - } - - FAPI_TRY(putScom(*l_iter, EX_L3_MODE_REG1, l_data64)); - - FAPI_TRY(getScom(*l_iter, EX_L3_MODE_REG0, l_data64)); - - if (l_excount == 2) + if (l_core_targets.size() == 0) { - FAPI_DBG("Assert L3_DYN_LCO_BLK_DIS_CFG on TARGET_ID[%d] via EX_L3_MODE_REG0[9]", l_exid); - FAPI_TRY(putScom(*l_iter, EX_L3_MODE_REG0, DATA_SET(9))); + FAPI_ERR("ERROR: NO Good Children Cores under this So-Called Good EX!"); + fapi2::current_err = fapi2::FAPI2_RC_FALSE; + goto fapi_try_exit; } else { - FAPI_DBG("Drop L3_DYN_LCO_BLK_DIS_CFG on TARGET_ID[%d] via EX_L3_MODE_REG0[9]", l_exid); - FAPI_TRY(putScom(*l_iter, EX_L3_MODE_REG0, DATA_UNSET(9))); + auto l_core = l_core_targets.begin(); + fapi2::Target<fapi2::TARGET_TYPE_CORE> l_ec = *l_core; + fapi2::Target<fapi2::TARGET_TYPE_PERV> l_perv = + l_ec.getParent<fapi2::TARGET_TYPE_PERV>(); + + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS, l_perv, + l_attr_chip_unit_pos)); + l_attr_chip_unit_pos = l_attr_chip_unit_pos - p9hcd::PERV_TO_CORE_POS_OFFSET; + l_exid = (l_attr_chip_unit_pos >> 1); + + FAPI_DBG("Setup L3-LCO on TARGET_ID[%d] via EX_L3_MODE_REG1[0,2-5,6-21]", l_exid); + FAPI_TRY(getScom(*l_iter, EX_L3_MODE_REG1, l_data64)); + l_data64.insertFromRight<2, 4>(l_exid).insertFromRight<6, 16>(l_exlist); + + if (l_excount > 1) + { + l_data64.setBit<0>(); + } + + FAPI_TRY(putScom(*l_iter, EX_L3_MODE_REG1, l_data64)); + + FAPI_TRY(getScom(*l_iter, EX_L3_MODE_REG0, l_data64)); + + if (l_excount == 2) + { + FAPI_DBG("Assert L3_DYN_LCO_BLK_DIS_CFG on TARGET_ID[%d] via EX_L3_MODE_REG0[9]", l_exid); + FAPI_TRY(putScom(*l_iter, EX_L3_MODE_REG0, DATA_SET(9))); + } + else + { + FAPI_DBG("Drop L3_DYN_LCO_BLK_DIS_CFG on TARGET_ID[%d] via EX_L3_MODE_REG0[9]", l_exid); + FAPI_TRY(putScom(*l_iter, EX_L3_MODE_REG0, DATA_UNSET(9))); + } } } } |
