diff options
| author | CHRISTINA L. GRAVES <clgraves@us.ibm.com> | 2017-02-14 16:53:25 -0600 |
|---|---|---|
| committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2017-04-06 22:35:57 -0400 |
| commit | 356734cb84bef9d16cc9c136dcba48e05cbe5648 (patch) | |
| tree | 768883aea58338e47a4bd662d9415ee68a6b4feb /src | |
| parent | 1cf500e1db727097d865120367bb7daf30ef69a5 (diff) | |
| download | talos-sbe-356734cb84bef9d16cc9c136dcba48e05cbe5648.tar.gz talos-sbe-356734cb84bef9d16cc9c136dcba48e05cbe5648.zip | |
Fix for HW397129-set bit 52 in the ALTD_OPTION reg to keep MC fastpath enabled
Change-Id: Ifd5be240823ea2ba4fdb6950404b429e33363bd8
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36466
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36468
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src')
3 files changed, 28 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_adu_coherent_utils.C b/src/import/chips/p9/procedures/hwp/nest/p9_adu_coherent_utils.C index bf98f561..a9af9369 100644 --- a/src/import/chips/p9/procedures/hwp/nest/p9_adu_coherent_utils.C +++ b/src/import/chips/p9/procedures/hwp/nest/p9_adu_coherent_utils.C @@ -58,6 +58,7 @@ extern "C" const uint32_t FBC_ALTD_PRE_QUIESCE_COUNT_NUM_OF_BITS = 20; const uint32_t FBC_ALTD_WITH_POST_INIT = 51; + const uint32_t FBC_ALTD_HW397129 = 52; const uint32_t FBC_ALTD_POST_INIT_COUNT_START_BIT = 54; // Bits 54:63 const uint32_t FBC_ALTD_POST_INIT_COUNT_NUM_OF_BITS = 10; @@ -293,6 +294,9 @@ extern "C" FBC_ALTD_POST_INIT_COUNT_NUM_OF_BITS> (INIT_SWITCH_WAIT_COUNT); + //If DD2 setup workaround for HW397129 to re-enable fastpath for DD2 + altd_option_reg_data.setBit<FBC_ALTD_HW397129>(); + // Write to ADU option reg FAPI_DBG("OPTION reg value 0x%016llX", altd_option_reg_data); FAPI_TRY(fapi2::putScom(i_target, PU_ALTD_OPTION_REG, altd_option_reg_data), diff --git a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml index 93e7a563..9ada22bd 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml @@ -2375,6 +2375,24 @@ </chipEcFeature> </attribute> + <attribute> + <id>ATTR_CHIP_EC_FEATURE_HW397129</id>> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description> + Attribute for if we need a workaround for re-enabling the MC fastpath since on + Nimbus DD1 is gets disabled. + </description> + <chipEcFeature> + <chip> + <name>ENUM_ATTR_NAME_NIMBUS</name> + <ec> + <value>0x20</value> + <test>LESS_THAN</test> + </ec> + </chip> + </chipEcFeature> + </attribute> + <!-- ******************************************************************** --> <!-- Memory Section --> <!-- ******************************************************************** --> diff --git a/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml index c49e3bed..755d9ef9 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml @@ -383,6 +383,12 @@ attribute tank </entry> <entry> + <name>ATTR_CHIP_EC_FEATURE_HW397129</name> + <virtual/> + </entry> + + + <entry> <name>ATTR_PROC_XSCOM_BAR_BASE_ADDR_OFFSET</name> <value>0x000003FC00000000</value> </entry> |
