summaryrefslogtreecommitdiffstats
path: root/src
diff options
context:
space:
mode:
authorBrian Silver <bsilver@us.ibm.com>2016-03-13 08:08:22 -0500
committerSachin Gupta <sgupta2m@in.ibm.com>2019-01-11 03:29:17 -0600
commit33aeb4130fcd608d39a74e484e96f25283c1a296 (patch)
treec35befbd5731729710ae512d81558bcc4bf83073 /src
parentd350afb8fe944b4647300cee514ecabb2d72a1ff (diff)
downloadtalos-sbe-33aeb4130fcd608d39a74e484e96f25283c1a296.tar.gz
talos-sbe-33aeb4130fcd608d39a74e484e96f25283c1a296.zip
Add initial FIR checking for APB interface
Change-Id: I6ca9ea84f6f5f34c8e766fe42e8cfa7d668d7a3e Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/21994 Tested-by: Jenkins Server Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70338 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src')
-rw-r--r--src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_lib.xml91
1 files changed, 91 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_lib.xml b/src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_lib.xml
index cdfeaeac..89bb4151 100644
--- a/src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_lib.xml
+++ b/src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_lib.xml
@@ -118,4 +118,95 @@
<ffdc>PROGRAM_LENGTH</ffdc>
</hwpError>
+ <hwpError>
+ <rc>RC_MSS_APB_INVALID_ADDRESS</rc>
+ <description>PHY APB interface is reporting an invalid address was read or written</description>
+ <ffdc>PORT_POSITION</ffdc>
+ <callout>
+ <target>TARGET_IN_ERROR</target>
+ <priority>HIGH</priority>
+ </callout>
+ </hwpError>
+
+ <hwpError>
+ <rc>RC_MSS_APB_WR_PAR_ERR</rc>
+ <description>PHY APB interface is reporting a read/write parity error</description>
+ <ffdc>PORT_POSITION</ffdc>
+ <callout>
+ <target>TARGET_IN_ERROR</target>
+ <priority>HIGH</priority>
+ </callout>
+ </hwpError>
+
+ <hwpError>
+ <rc>RC_MSS_FATAL_FSM_PHYTOP</rc>
+ <description>Indicates a non-recoverable FSM state checker error in PHYTOP logic</description>
+ <ffdc>PORT_POSITION</ffdc>
+ <callout>
+ <target>TARGET_IN_ERROR</target>
+ <priority>HIGH</priority>
+ </callout>
+ </hwpError>
+
+ <hwpError>
+ <rc>RC_MSS_FATAL_PARITY_PHYTOP</rc>
+ <description>Indicates a non-recoverable parity error in PHYTOP logic</description>
+ <ffdc>PORT_POSITION</ffdc>
+ <callout>
+ <target>TARGET_IN_ERROR</target>
+ <priority>HIGH</priority>
+ </callout>
+ </hwpError>
+
+ <hwpError>
+ <rc>RC_MSS_FSM_PHYTOP</rc>
+ <description>Indicates a recoverable FSM state checker error in PHYTOP logic</description>
+ <ffdc>PORT_POSITION</ffdc>
+ <callout>
+ <target>TARGET_IN_ERROR</target>
+ <priority>HIGH</priority>
+ </callout>
+ </hwpError>
+
+ <hwpError>
+ <rc>RC_MSS_PARITY_PHYTOP</rc>
+ <description>Indicates a recoverable register parity error in PHYTOP logic</description>
+ <ffdc>PORT_POSITION</ffdc>
+ <callout>
+ <target>TARGET_IN_ERROR</target>
+ <priority>HIGH</priority>
+ </callout>
+ </hwpError>
+
+ <hwpError>
+ <rc>RC_MSS_FATAL_ADR52_MASTER</rc>
+ <description>Indicates a non-recoverable register parity error in ADR52 master side logic</description>
+ <ffdc>PORT_POSITION</ffdc>
+ <callout>
+ <target>TARGET_IN_ERROR</target>
+ <priority>HIGH</priority>
+ </callout>
+ </hwpError>
+
+ <hwpError>
+ <rc>RC_MSS_FATAL_ADR52_SLAVE</rc>
+ <description>Indicates a non-recoverable register parity error in ADR52 slave side logic</description>
+ <ffdc>PORT_POSITION</ffdc>
+ <callout>
+ <target>TARGET_IN_ERROR</target>
+ <priority>HIGH</priority>
+ </callout>
+ </hwpError>
+
+ <hwpError>
+ <rc>RC_MSS_FSM_DP16</rc>
+ <description>Indicates a recoverable FSM state checker error in a DP16</description>
+ <ffdc>PORT_POSITION</ffdc>
+ <ffdc>DP16_POSITION</ffdc>
+ <callout>
+ <target>TARGET_IN_ERROR</target>
+ <priority>HIGH</priority>
+ </callout>
+ </hwpError>
+
</hwpErrors>
OpenPOWER on IntegriCloud